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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-10-30 21:54:45 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-10-30 21:54:45 +0000 |
| commit | 97005786d89fd7a57b5fe82f713cea739916f3da (patch) | |
| tree | cfff15a6bc93114480ecd20f6afddde3dcd74470 /c/src/lib/libbsp/m68k/gen68302/start/start302.s | |
| parent | reordered test cases from simple to complex (diff) | |
| download | rtems-97005786d89fd7a57b5fe82f713cea739916f3da.tar.bz2 | |
SPARC port passes all tests
Diffstat (limited to 'c/src/lib/libbsp/m68k/gen68302/start/start302.s')
| -rw-r--r-- | c/src/lib/libbsp/m68k/gen68302/start/start302.s | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/c/src/lib/libbsp/m68k/gen68302/start/start302.s b/c/src/lib/libbsp/m68k/gen68302/start/start302.s index d92ed1ce6b..311cd3fa39 100644 --- a/c/src/lib/libbsp/m68k/gen68302/start/start302.s +++ b/c/src/lib/libbsp/m68k/gen68302/start/start302.s @@ -193,7 +193,6 @@ cpy_Bad1: move.l d1,(a0)+ | move.l #_cnsl_isr,vbase+0x028 | SCC2 move.l #timerisr,vbase+0x018 | Timer ISR - move.l #RTC_ISR,vbase+0x024 | Real Time Clock ISR | | zero out uninitialized data area @@ -236,14 +235,6 @@ loop: movel d0,a1@+ | to zero out uninitialized Bad: bra Bad nop -RTC_ISR: - movem.l d0-d1/a0-a1,a7@- | save d0-d1,a0-a1 - addql #1,_ISR_Nest_level | one nest level deeper - addql #1,_Thread_Dispatch_disable_level - | disable multitasking - - jbsr Clock_isr | invoke the user ISR - jmp _ISR_Exit END_CODE |