diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-05-11 17:39:37 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-05-11 17:39:37 +0000 |
commit | ac7d5ef06a6d6e8d84abbd1f0b82162725f98326 (patch) | |
tree | 9304cf759a73f2a1c6fd3191948f00e870af3787 /c/src/lib/libbsp/m68k/dmv152 | |
download | rtems-ac7d5ef06a6d6e8d84abbd1f0b82162725f98326.tar.bz2 |
Initial revision
Diffstat (limited to 'c/src/lib/libbsp/m68k/dmv152')
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c | 101 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/console/console.c | 186 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/include/bsp.h | 169 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/include/coverhd.h | 104 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/spurious/spinit.c | 46 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c | 171 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/startup/linkcmds | 48 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/startup/vmeintr.c | 60 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/timer/timer.c | 105 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/timer/timerisr.s | 38 |
10 files changed, 1028 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c new file mode 100644 index 0000000000..d5f0f5e023 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c @@ -0,0 +1,101 @@ +/* Clock_init() + * + * This routine initializes the Z80386 1 on the MVME136 board. + * The tick frequency is 1 millisecond. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <stdlib.h> + +#include <rtems.h> +#include <bsp.h> +#include <clockdrv.h> + +rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ +volatile rtems_unsigned32 Clock_driver_ticks; + /* ticks since initialization */ +rtems_isr_entry Old_ticker; + +rtems_device_driver Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp, + rtems_id tid, + rtems_unsigned32 *rval +) +{ + Install_clock( Clock_isr ); +} + +void ReInstall_clock( + rtems_isr_entry clock_isr +) +{ + rtems_unsigned32 isrlevel = 0 ; + + rtems_interrupt_disable( isrlevel ); + (void) set_vector( clock_isr, TIMER_VECTOR, 1 ); + rtems_interrupt_enable( isrlevel ); +} + +void Install_clock( + rtems_isr_entry clock_isr +) +{ + rtems_unsigned8 data; + + Clock_driver_ticks = 0; + Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; + + if ( BSP_Configuration.ticks_per_timeslice ) { + Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_VECTOR, 1 ); + + Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE ); + Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 ); + Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 ); + + /* + * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6 + */ + + data = (*(rtems_unsigned8 *)0x0D00000B); + (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60; + + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 ); + + atexit( Clock_exit ); + } +} + +void Clock_exit( void ) +{ + rtems_unsigned8 data; + + if ( BSP_Configuration.ticks_per_timeslice ) { + + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); + /* do not restore old vector */ + + } +} diff --git a/c/src/lib/libbsp/m68k/dmv152/console/console.c b/c/src/lib/libbsp/m68k/dmv152/console/console.c new file mode 100644 index 0000000000..bb0f365b9c --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/console/console.c @@ -0,0 +1,186 @@ +/* + * This file contains the DMV152 console IO package. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#define D152_INIT + +#include <rtems.h> +#include "console.h" +#include "bsp.h" + +/* console_initialize + * + * This routine initializes the console IO driver. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_device_driver console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg, + rtems_id self, + rtems_unsigned32 *status +) +{ + *status = RTEMS_SUCCESSFUL; +} + + +/* is_character_ready + * + * This routine returns TRUE if a character is available. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_boolean is_character_ready( + char *ch +) +{ + rtems_unsigned8 rr_0; + + for ( ; ; ) { + Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); + if ( !(rr_0 & RR_0_RX_DATA_AVAILABLE) ) + return( FALSE ); + + Z8x30_READ_DATA( CONSOLE_DATA, *ch ); + return( TRUE ); + } +} + +/* inbyte + * + * This routine reads a character from the SCC. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + * character read from SCC + */ + +char inbyte( void ) +{ + rtems_unsigned8 rr_0; + char ch; + + for ( ; ; ) { + Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); + if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 ) + break; + } + + Z8x30_READ_DATA( CONSOLE_DATA, ch ); + return ( ch ); +} + +/* outbyte + * + * This routine transmits a character out the SCC. It supports + * XON/XOFF flow control. + * + * Input parameters: + * ch - character to be transmitted + * + * Output parameters: NONE + */ + +void outbyte( + char ch +) +{ + rtems_unsigned8 rr_0; + char flow_control; + + for ( ; ; ) { + Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); + if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 ) + break; + } + + for ( ; ; ) { + Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); + if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 ) + break; + + Z8x30_READ_DATA( CONSOLE_DATA, flow_control ); + + if ( flow_control == XOFF ) + do { + do { + Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 ); + } while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 ); + Z8x30_READ_DATA( CONSOLE_DATA, flow_control ); + } while ( flow_control != XON ); + } + + Z8x30_WRITE_DATA( CONSOLE_DATA, ch ); +} + +/* + * __read -- read bytes from the serial port. Ignore fd, since + * we only have stdin. + */ + +int __read( + int fd, + char *buf, + int nbytes +) +{ + int i = 0; + + for (i = 0; i < nbytes; i++) { + *(buf + i) = inbyte(); + if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) { + (*(buf + i++)) = '\n'; + (*(buf + i)) = 0; + break; + } + } + return (i); +} + +/* + * __write -- write bytes to the serial port. Ignore fd, since + * stdout and stderr are the same. Since we have no filesystem, + * open will only return an error. + */ + +int __write( + int fd, + char *buf, + int nbytes +) +{ + int i; + + for (i = 0; i < nbytes; i++) { + if (*(buf + i) == '\n') { + outbyte ('\r'); + } + outbyte (*(buf + i)); + } + return (nbytes); +} diff --git a/c/src/lib/libbsp/m68k/dmv152/include/bsp.h b/c/src/lib/libbsp/m68k/dmv152/include/bsp.h new file mode 100644 index 0000000000..7e4f423102 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/include/bsp.h @@ -0,0 +1,169 @@ +/* bsp.h + * + * This include file contains all DMV152 board IO definitions. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __DMV152_h +#define __DMV152_h + +#ifdef __cplusplus +extern "C" { +#endif + +#include <rtems.h> +#include <iosupp.h> +#include <z8530.h> +#include <z8536.h> + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +/* use a VMEbus interrupt */ + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#define Install_tm27_vector( handler ) \ + { \ + set_vector( (handler), 0x50, 1 ); \ + (*(volatile rtems_unsigned32 *)0x0d800024) = 0x50; /* set IVECT reg */ \ + (*(volatile rtems_unsigned8 *)0x0d00000c) = 0x40; /* set VIE reg */ \ + } + +#define Cause_tm27_intr() \ + (*(volatile rtems_unsigned8 *)0x0d000003) = 0x0f /* set VINT */ + +#define Clear_tm27_intr() /* no operation necessary */ + +#define Lower_tm27_intr() + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) \ + { register rtems_unsigned32 _delay=(microseconds); \ + register rtems_unsigned32 _tmp=123; \ + asm volatile( "0: \ + nbcd %0 ; \ + nbcd %0 ; \ + dbf %1,0b" \ + : "=d" (_tmp), "=d" (_delay) \ + : "0" (_tmp), "1" (_delay) ); \ + } + +/* macros */ + +#undef Z8x36_STATE0 +#undef Z8x36_WRITE +#undef Z8x36_READ + +#define Z8x36_STATE0 ( z8536 ) \ + { char *garbage; \ + (garbage) = *(VOL8(z8536+0x7)) \ + } + +#define Z8x36_WRITE( z8536, reg, data ) \ + *(VOL8(z8536+0x7)) = (reg); \ + *(VOL8(z8536+0x7)) = (data) + +#define Z8x36_READ( z8536, reg, data ) \ + *(VOL8(z8536+0x7)) = (reg); \ + (data) = *(VOL8(z8536+0x7)) + +/* + * ACC Register Addresses + */ + +#define ACC_BASE 0x0D000000 + +#define ACC_STAT0 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x00)) +#define ACC_STAT1 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x01)) +#define ACC_GENCTL ((volatile rtems_unsigned8 *) (ACC_BASE + 0x02)) +#define ACC_VINT ((volatile rtems_unsigned8 *) (ACC_BASE + 0x03)) +#define ACC_VREQ ((volatile rtems_unsigned8 *) (ACC_BASE + 0x04)) +#define ACC_VARB ((volatile rtems_unsigned8 *) (ACC_BASE + 0x05)) +#define ACC_ID ((volatile rtems_unsigned8 *) (ACC_BASE + 0x06)) +#define ACC_CTL2 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x07)) +#define ACC_7IS ((volatile rtems_unsigned8 *) (ACC_BASE + 0x08)) +#define ACC_LIS ((volatile rtems_unsigned8 *) (ACC_BASE + 0x09)) +#define ACC_7IE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0A)) +#define ACC_LIE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0B)) +#define ACC_VIE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0C)) +#define ACC_IC10 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0D)) +#define ACC_IC32 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0E)) +#define ACC_IC54 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0F)) + +/* constants */ + +#define RAM_START 0 +#define RAM_END 0x100000 + +#define USE_CHANNEL_A 0 /* 1 = use channel A for console */ +#define USE_CHANNEL_B 1 /* 1 = use channel B for console */ + +#define TIMER 0x0c000000 +#define TIMER_VECTOR 0x4D + +#if (USE_CHANNEL_A == 1) +#define CONSOLE_CONTROL 0x0C800007 +#define CONSOLE_DATA 0x0C800005 +#elif (USE_CHANNEL_B == 1) +#define CONSOLE_CONTROL 0x0C800001 +#define CONSOLE_DATA 0x0C800003 +#endif + +/* Structures */ + +#ifdef D152_INIT +#undef EXTERN +#define EXTERN +#else +#undef EXTERN +#define EXTERN extern +#endif + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +extern m68k_isr M68Kvec[]; /* vector table address */ + +/* functions */ + +void bsp_cleanup( void ); + +m68k_isr set_vector( + rtems_isr_entry handler, + rtems_vector_number vector, + int type +); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/dmv152/include/coverhd.h b/c/src/lib/libbsp/m68k/dmv152/include/coverhd.h new file mode 100644 index 0000000000..0033a50502 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/include/coverhd.h @@ -0,0 +1,104 @@ +/* coverhd.h + * + * This include file has defines to represent the overhead associated + * with calling a particular directive from C on this target. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __COVERHD_h +#define __COVERHD_h + +#ifdef __cplusplus +extern "C" { +#endif + +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 2 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 1 +#define CALLING_OVERHEAD_TASK_CREATE 3 +#define CALLING_OVERHEAD_TASK_IDENT 2 +#define CALLING_OVERHEAD_TASK_START 2 +#define CALLING_OVERHEAD_TASK_RESTART 2 +#define CALLING_OVERHEAD_TASK_DELETE 1 +#define CALLING_OVERHEAD_TASK_SUSPEND 1 +#define CALLING_OVERHEAD_TASK_RESUME 2 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 2 +#define CALLING_OVERHEAD_TASK_MODE 2 +#define CALLING_OVERHEAD_TASK_GET_NOTE 2 +#define CALLING_OVERHEAD_TASK_SET_NOTE 2 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 4 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 1 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 2 +#define CALLING_OVERHEAD_CLOCK_GET 4 +#define CALLING_OVERHEAD_CLOCK_SET 4 +#define CALLING_OVERHEAD_CLOCK_TICK 1 + +#define CALLING_OVERHEAD_TIMER_CREATE 2 +#define CALLING_OVERHEAD_TIMER_IDENT 1 +#define CALLING_OVERHEAD_TIMER_DELETE 2 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 2 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 5 +#define CALLING_OVERHEAD_TIMER_RESET 1 +#define CALLING_OVERHEAD_TIMER_CANCEL 1 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 2 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 1 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 2 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 2 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 1 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 1 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 2 + +#define CALLING_OVERHEAD_EVENT_SEND 2 +#define CALLING_OVERHEAD_EVENT_RECEIVE 2 +#define CALLING_OVERHEAD_SIGNAL_CATCH 2 +#define CALLING_OVERHEAD_SIGNAL_SEND 2 +#define CALLING_OVERHEAD_PARTITION_CREATE 3 +#define CALLING_OVERHEAD_PARTITION_IDENT 2 +#define CALLING_OVERHEAD_PARTITION_DELETE 2 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 2 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 2 +#define CALLING_OVERHEAD_REGION_CREATE 3 +#define CALLING_OVERHEAD_REGION_IDENT 2 +#define CALLING_OVERHEAD_REGION_DELETE 1 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 3 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 2 +#define CALLING_OVERHEAD_PORT_CREATE 3 +#define CALLING_OVERHEAD_PORT_IDENT 2 +#define CALLING_OVERHEAD_PORT_DELETE 2 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2 + +#define CALLING_OVERHEAD_IO_INITIALIZE 3 +#define CALLING_OVERHEAD_IO_OPEN 2 +#define CALLING_OVERHEAD_IO_CLOSE 2 +#define CALLING_OVERHEAD_IO_READ 2 +#define CALLING_OVERHEAD_IO_WRITE 2 +#define CALLING_OVERHEAD_IO_CONTROL 2 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 2 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 1 + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/dmv152/spurious/spinit.c b/c/src/lib/libbsp/m68k/dmv152/spurious/spinit.c new file mode 100644 index 0000000000..47f6e7c0be --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/spurious/spinit.c @@ -0,0 +1,46 @@ +/* Spurious_driver + * + * This routine installs spurious interrupt handlers for the DMV152. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993. + * On-Line Applications Research Corporation (OAR). + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <stdio.h> + +rtems_isr Spurious_Isr( + rtems_vector_number vector +) +{ + void *sp = 0; + + asm volatile ( "movea.l %%sp,%0 " : "=a" (sp) : "0" (sp) ); + + fprintf( stderr, "Vector 0x%x sp=0x%p\n", vector, sp ); +} + +rtems_device_driver Spurious_Initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp, + rtems_id tid, + rtems_unsigned32 *rval +) +{ + rtems_vector_number vector; + + for ( vector = 0x40 ; vector <= 0xFF ; vector++ ) + (void) set_vector( Spurious_Isr, vector, 1 ); +} diff --git a/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c b/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c new file mode 100644 index 0000000000..a0ec9b7e71 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c @@ -0,0 +1,171 @@ +#define STACK_CHECKER_ON +/* bsp_start() + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <libcsupport.h> +#include <vmeintr.h> + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +/* Initialize whatever libc we are using + * called from postdriver hook + */ + +void bsp_libc_init() +{ + extern int end; + rtems_unsigned32 heap_start; + + heap_start = (rtems_unsigned32) &end; + if (heap_start & (CPU_ALIGNMENT-1)) + heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); + + RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0); + + /* + * Set up for the libc handling. + */ + + if (BSP_Configuration.ticks_per_timeslice > 0) + libc_init(1); /* reentrant if possible */ + else + libc_init(0); /* non-reentrant */ + + /* + * Initialize the stack bounds checker + */ + +#ifdef STACK_CHECKER_ON + Stack_check_Initialize(); +#endif +} + +int bsp_start( + int argc, + char **argv, + char **environp +) +{ + m68k_isr *monitors_vector_table; + int index; + void *vbr; + + monitors_vector_table = (m68k_isr *)0; /* Monitor Vectors are at 0 */ + m68k_set_vbr( monitors_vector_table ); + + for ( index=2 ; index<=255 ; index++ ) + M68Kvec[ index ] = monitors_vector_table[ 32 ]; + + M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */ + M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */ + M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */ + + /* + * Uncommenting this seems to confuse/break the monitor on this board. + * It probably assumes the vector table is at 0. + */ + + /* m68k_set_vbr( &M68Kvec ); */ + + /* + * Adjust the VMEbus mode to round-robin. + */ + + /* + * This is only apparent with the shared memory driver which has not + * yet been supported on this target. + */ + + m68k_enable_caching(); + + /* + * we only use a hook to get the C library initialized. + */ + + Cpu_table.pretasking_hook = NULL; + + Cpu_table.predriver_hook = bsp_libc_init; /* RTEMS resources available */ + + Cpu_table.postdriver_hook = NULL; /* Call our main() for constructors */ + + Cpu_table.idle_task = NULL; /* do not override system IDLE task */ + + Cpu_table.do_zero_of_workspace = TRUE; + + m68k_get_vbr( vbr ); + Cpu_table.interrupt_vector_table = vbr; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.extra_system_initialization_stack = 0; + + /* + * Copy the table + */ + + BSP_Configuration = Configuration; + + BSP_Configuration.work_space_start = (void *) + (RAM_END - BSP_Configuration.work_space_size); + + /* + * Add 1 region for Malloc in libc_low + */ + + BSP_Configuration.maximum_regions++; + + /* + * Add 1 extension for newlib libc + */ + +#ifdef RTEMS_NEWLIB + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Add another extension if using the stack checker + */ + +#ifdef STACK_CHECKER_ON + BSP_Configuration.maximum_extensions++; +#endif + + rtems_initialize_executive( &BSP_Configuration, &Cpu_table ); + /* does not return */ + + /* Clock_exit is done as an atexit() function */ + + VME_interrupt_Disable( 0xff ); + + /* return like a "normal" subroutine to the monitor */ + return 0; +} diff --git a/c/src/lib/libbsp/m68k/dmv152/startup/linkcmds b/c/src/lib/libbsp/m68k/dmv152/startup/linkcmds new file mode 100644 index 0000000000..76f43eec97 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/startup/linkcmds @@ -0,0 +1,48 @@ +/* + * This file contains directives for the GNU linker which are specific + * to the DY-4 DMV152/SVME153 boards. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +MEMORY + { + ram : org = 0x12800, l = 1M + } + +SECTIONS +{ + .text 0x12800 : + { + text_start = . ; + _text_start = . ; + *(.text) + etext = ALIGN( 0x10 ) ; + _etext = .; + } + .data ADDR( .text ) + SIZEOF( .text ): + { + data_start = . ; + _data_start = . ; + *(.data) + edata = ALIGN( 0x10 ) ; + _edata = .; + } + .bss ADDR( .data ) + SIZEOF( .data ): + { + bss_start = . ; + _bss_start = . ; + *(.bss) + *(COMMON) + end = . ; + _end = . ; + } +} diff --git a/c/src/lib/libbsp/m68k/dmv152/startup/vmeintr.c b/c/src/lib/libbsp/m68k/dmv152/startup/vmeintr.c new file mode 100644 index 0000000000..700b06776d --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/startup/vmeintr.c @@ -0,0 +1,60 @@ +/* vmeintr.c + * + * VMEbus support routines for the DMV152. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <vmeintr.h> + +/*PAGE + * + * VME_interrupt_Disable + * + */ + +void VME_interrupt_Disable ( + VME_interrupt_Mask mask /* IN */ +) +{ + volatile rtems_unsigned8 *VME_interrupt_enable; + rtems_unsigned8 value; + + VME_interrupt_enable = ACC_VIE; + value = *VME_interrupt_enable; + + value &= ~mask; /* turn off interrupts for all levels in mask */ + + *VME_interrupt_enable = value; +} + +/*PAGE + * + * VME_interrupt_Enable + * + */ + +void VME_interrupt_Enable ( + VME_interrupt_Mask mask /* IN */ +) +{ + volatile rtems_unsigned8 *VME_interrupt_enable; + rtems_unsigned8 value; + + VME_interrupt_enable = ACC_VIE; + value = *VME_interrupt_enable; + + value |= mask; /* turn on interrupts for all levels in mask */ + + *VME_interrupt_enable = value; +} diff --git a/c/src/lib/libbsp/m68k/dmv152/timer/timer.c b/c/src/lib/libbsp/m68k/dmv152/timer/timer.c new file mode 100644 index 0000000000..2e91a671df --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/timer/timer.c @@ -0,0 +1,105 @@ +/* timer.c + * + * NOTE: These routines will not work if the optimizer is enabled + * for some compilers. The multiple writes to the Z8036 + * may be optimized away. + * + * It is important that the timer start/stop overhead be + * determined when porting or modifying this code. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + + +#include <rtems.h> +#include <bsp.h> + +int Ttimer_val; +rtems_boolean Timer_driver_Find_average_overhead; + +rtems_isr timerisr(); + +void Timer_initialize() +{ + rtems_unsigned8 data; + + (void) set_vector( timerisr, TIMER_VECTOR, 0 ); /* install ISR */ + + Ttimer_val = 0; /* clear timer ISR count */ + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); + + Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 ); + Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x87 ); + Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x26 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 ); + + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 ); + + /* + * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6 + */ + + data = (*(rtems_unsigned8 *)0x0D00000B); + (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x0F) | 0x60; + +} + +#define AVG_OVERHEAD 9 /* It typically takes 3.65 microseconds */ + /* (9 countdowns) to start/stop the timer. */ +#define LEAST_VALID 10 /* Don't trust a value lower than this */ + +int Read_timer() +{ + rtems_unsigned8 data; + rtems_unsigned8 msb, lsb; + rtems_unsigned32 remaining, total; + + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */ + Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb ); + Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb ); + + remaining = 0x10000 - ((msb << 8) + lsb); + total = (Ttimer_val * 0x10000) + remaining; + + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); + + /* do not restore old vector */ + if ( Timer_driver_Find_average_overhead == 1 ) + return total; /* in countdown units */ + + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + + /* Clocked at 2.4615 Mhz */ + + return (int)(((float)(total-AVG_OVERHEAD)) / 2.4615 * 2.0); +} + +rtems_status_code Empty_function( void ) +{ + return RTEMS_SUCCESSFUL; +} + +void Set_find_average_overhead( + rtems_boolean find_flag +) +{ + Timer_driver_Find_average_overhead = find_flag; +} diff --git a/c/src/lib/libbsp/m68k/dmv152/timer/timerisr.s b/c/src/lib/libbsp/m68k/dmv152/timer/timerisr.s new file mode 100644 index 0000000000..d7ec593c62 --- /dev/null +++ b/c/src/lib/libbsp/m68k/dmv152/timer/timerisr.s @@ -0,0 +1,38 @@ +/* timer_isr() + * + * This routine provides the ISR for the Z8536 timer on the DMV152 + * board. The timer is set up to generate an interrupt at maximum + * intervals. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + +.set TIMER, 0x0c000007 | port A +.set CT1_CMD_STATUS, 0x0a | command status register +.set RELOAD, 0x26 | clr IP & IUS,allow countdown + + PUBLIC(timerisr) +SYM (timerisr): + movb #CT1_CMD_STATUS,TIMER | set pointer to cmd status reg + movb #RELOAD,TIMER | reload countdown + addql #1, SYM (Ttimer_val) | increment timer value + rte + +END_CODE +END |