diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-01-11 17:34:20 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-01-11 17:34:20 +0000 |
| commit | 0dd1d44582dd2b39a791aa60f76358ff9bba8cd8 (patch) | |
| tree | 6be7a7b7d21975f08ba16993958e4bca5177dc76 /c/src/lib/libbsp/m68k/dmv152 | |
| parent | Patch from Emmanuel Raguet <raguet@crf.canon.fr> to correct macro (diff) | |
| download | rtems-0dd1d44582dd2b39a791aa60f76358ff9bba8cd8.tar.bz2 | |
Removed old hack of using Configuration Table entry ticks_per_timeslice
being set to 0 to indicate that there should be no Clock Tick. This
was used by the Timing Tests to avoid clock tick overhead perturbing
execution times. Now the Timing Tests simply leave the Clock Tick
Driver out of the Device Driver Table.
Diffstat (limited to 'c/src/lib/libbsp/m68k/dmv152')
| -rw-r--r-- | c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c | 50 |
1 files changed, 22 insertions, 28 deletions
diff --git a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c index 0fdd8c5352..3d83c739f5 100644 --- a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c @@ -69,44 +69,38 @@ void Install_clock( Clock_driver_ticks = 0; Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; - if ( BSP_Configuration.ticks_per_timeslice ) { - Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); - - Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 ); - Z8x36_READ ( TIMER, MASTER_INTR, data ); - Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) ); - Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 ); - Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE ); - Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 ); - Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, CLOCK_VECTOR ); - Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 ); - Z8x36_READ ( TIMER, MASTER_INTR, data ); - Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 ); + Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); + + Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE ); + Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 ); + Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, CLOCK_VECTOR ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 ); + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 ); - /* - * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6 - */ + /* + * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6 + */ - data = (*(rtems_unsigned8 *)0x0D00000B); - (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60; + data = (*(rtems_unsigned8 *)0x0D00000B); + (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60; - Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 ); - atexit( Clock_exit ); - } + atexit( Clock_exit ); } void Clock_exit( void ) { rtems_unsigned8 data; - if ( BSP_Configuration.ticks_per_timeslice ) { - - Z8x36_READ ( TIMER, MASTER_INTR, data ); - Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); - /* do not restore old vector */ - - } + Z8x36_READ ( TIMER, MASTER_INTR, data ); + Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); + /* do not restore old vector */ } rtems_device_driver Clock_initialize( |