diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 10:35:35 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 13:52:14 +0200 |
commit | 99648958668d3a33ee57974479b36201fe303f34 (patch) | |
tree | 6f27ea790e2823c6156e71219a4f54680263fac6 /c/src/lib/libbsp/m68k/csb360 | |
parent | bsps: Move start files to bsps (diff) | |
download | rtems-99648958668d3a33ee57974479b36201fe303f34.tar.bz2 |
bsps: Move startup files to bsps
Adjust build support files to new directory layout.
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'c/src/lib/libbsp/m68k/csb360')
-rw-r--r-- | c/src/lib/libbsp/m68k/csb360/Makefile.am | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/csb360/startup/bsp_specs | 9 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/csb360/startup/init5272.c | 146 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/csb360/startup/linkcmds | 174 |
4 files changed, 2 insertions, 331 deletions
diff --git a/c/src/lib/libbsp/m68k/csb360/Makefile.am b/c/src/lib/libbsp/m68k/csb360/Makefile.am index 91812aeec2..b73165982c 100644 --- a/c/src/lib/libbsp/m68k/csb360/Makefile.am +++ b/c/src/lib/libbsp/m68k/csb360/Makefile.am @@ -3,7 +3,7 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -dist_project_lib_DATA = startup/bsp_specs +dist_project_lib_DATA = ../../../../../../bsps/m68k/csb360/start/bsp_specs @@ -21,7 +21,7 @@ librtemsbsp_a_SOURCES = librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspfatal-default.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspgetworkarea-default.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspstart-empty.c -librtemsbsp_a_SOURCES += startup/init5272.c +librtemsbsp_a_SOURCES += ../../../../../../bsps/m68k/csb360/start/init5272.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/getentropy/getentropy-cpucounter.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/sbrk.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/setvec.c diff --git a/c/src/lib/libbsp/m68k/csb360/startup/bsp_specs b/c/src/lib/libbsp/m68k/csb360/startup/bsp_specs deleted file mode 100644 index 87638cc027..0000000000 --- a/c/src/lib/libbsp/m68k/csb360/startup/bsp_specs +++ /dev/null @@ -1,9 +0,0 @@ -%rename endfile old_endfile -%rename startfile old_startfile - -*startfile: -%{!qrtems: %(old_startfile)} \ -%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}} - -*endfile: -%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s} diff --git a/c/src/lib/libbsp/m68k/csb360/startup/init5272.c b/c/src/lib/libbsp/m68k/csb360/startup/init5272.c deleted file mode 100644 index 267fd551b4..0000000000 --- a/c/src/lib/libbsp/m68k/csb360/startup/init5272.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * CSB360 hardware startup routines - * - * This is where the real hardware setup is done. A minimal stack - * has been provided by the start.S code. No normal C or RTEMS - * functions can be called from here. - * - * This initialization code based on hardware settings of dBUG - * monitor. This must be changed if you like to run it immediately - * after reset. - */ - -/* - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov <vvv@oktet.ru> - * - * Based on work: - * Author: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <bsp.h> -#include <mcf5272/mcf5272.h> - -/* externs */ -extern void clear_bss(void); -extern void start_csb360(void); -extern void INTERRUPT_VECTOR(void); - -/* Set the pointers to the modules */ -sim_regs_t *g_sim_regs = (void *) MCF5272_SIM_BASE(BSP_MBAR); -intctrl_regs_t *g_intctrl_regs = (void *) MCF5272_INT_BASE(BSP_MBAR); -chipsel_regs_t *g_chipsel_regs = (void *) MCF5272_CS_BASE(BSP_MBAR); -gpio_regs_t *g_gpio_regs = (void *) MCF5272_GPIO_BASE(BSP_MBAR); -qspi_regs_t *g_qspi_regs = (void *) MCF5272_QSPI_BASE(BSP_MBAR); -pwm_regs_t *g_pwm_regs = (void *) MCF5272_PWM_BASE(BSP_MBAR); -dma_regs_t *g_dma_regs = (void *) MCF5272_DMAC_BASE(BSP_MBAR); -uart_regs_t *g_uart0_regs = (void *) MCF5272_UART0_BASE(BSP_MBAR); -uart_regs_t *g_uart1_regs = (void *) MCF5272_UART1_BASE(BSP_MBAR); -timer_regs_t *g_timer_regs = (void *) MCF5272_TIMER_BASE(BSP_MBAR); -plic_regs_t *g_plic_regs = (void *) MCF5272_PLIC_BASE(BSP_MBAR); -enet_regs_t *g_enet_regs = (void *) MCF5272_ENET_BASE(BSP_MBAR); -usb_regs_t *g_usb_regs = (void *) MCF5272_USB_BASE(BSP_MBAR); - -#define m68k_set_srambar( _rambar0 ) \ - __asm__ volatile ( "movec %0,%%rambar0\n\t" \ - "nop\n\t" \ - : : "d" (_rambar0) ) - -#define m68k_set_mbar( _mbar ) \ - __asm__ volatile ( "movec %0,%%mbar\n\t" \ - "nop\n\t" \ - : : "d" (_mbar) ) - -#define mcf5272_enable_cache() \ - m68k_set_cacr( MCF5272_CACR_CENB ) - - -#define mcf5272_disable_cache() \ - __asm__ volatile ( "nop\n\t" \ - "movec %0,%%cacr\n\t" \ - "nop\n\t" \ - "movec %0,%%cacr\n\t" \ - "nop\n\t" \ - : : "d" (MCF5272_CACR_CINV) ) - -/* - * Initialize MCF5272 on-chip modules - */ -void init5272(void) -{ - /* Invalidate the cache - WARNING: It won't complete for 64 clocks */ - m68k_set_cacr(MCF5272_CACR_CINV); - - /* Set Module Base Address register */ - m68k_set_mbar((BSP_MBAR & MCF5272_MBAR_BA) | MCF5272_MBAR_V); - - /* Set RAM Base Address register */ - m68k_set_srambar((BSP_RAMBAR & MCF5272_RAMBAR_BA) | MCF5272_RAMBAR_V); - - /* Set System Control Register: - * Enet has highest priority, 16384 bus cycles before timeout - */ - g_sim_regs->scr = (MCF5272_SCR_HWR_16384); - - /* System Protection Register: - * Enable Hardware watchdog timer. - */ - g_sim_regs->spr = MCF5272_SPR_HWTEN; - - /* Clear and mask all interrupts */ - g_intctrl_regs->icr1 = 0x88888888; - g_intctrl_regs->icr2 = 0x88888888; - g_intctrl_regs->icr3 = 0x88888888; - g_intctrl_regs->icr4 = 0x88880000; - - /* Copy the interrupt vector table to SRAM */ - { - uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR; - uint32_t *intvec = (uint32_t *)BSP_RAMBAR; - register int i; - for (i = 0; i < 256; i++) { - *(intvec++) = *(inttab++); - } - } - m68k_set_vbr(BSP_RAMBAR); - - - /* - * Setup ACRs so that if cache turned on, periphal accesses - * are not messed up. (Non-cacheable, serialized) - */ - m68k_set_acr0(MCF5272_ACR_BASE(BSP_MEM_ADDR_SDRAM) | - MCF5272_ACR_MASK(BSP_MEM_MASK_SDRAM) | - MCF5272_ACR_EN | - MCF5272_ACR_SM_ANY); - -/* - m68k_set_acr1 (MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH) | - MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH) | - MCF5206E_ACR_EN | - MCF5206E_ACR_SM_ANY); -*/ - - /* Enable the caches */ - m68k_set_cacr(MCF5272_CACR_CENB | - MCF5272_CACR_DCM); /* Default is not cached */ - -/* - * Copy data, clear BSS, switch stacks and call boot_card() - */ -/* -CopyDataClearBSSAndStart(BSP_MEM_SIZE_ESRAM - 0x400); -*/ - clear_bss(); - start_csb360(); - -} diff --git a/c/src/lib/libbsp/m68k/csb360/startup/linkcmds b/c/src/lib/libbsp/m68k/csb360/startup/linkcmds deleted file mode 100644 index 09670c156d..0000000000 --- a/c/src/lib/libbsp/m68k/csb360/startup/linkcmds +++ /dev/null @@ -1,174 +0,0 @@ -/* - * This file contains GNU linker directives for the Cogent - * CSB360 development board. - * - * Copyright (C) 2004 Cogent Computer Systems - * Author: Jay Monkman <jtm@lopingdog.com> - */ - -/* - * Declare size of heap. - * A heap size of 0 means "Use all available memory for the heap". - * Initial stack located in on-chip SRAM and not declared there. - */ -HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -RamBase = DEFINED(RamBase) ? RamBase : 0x00100000; -RamSize = DEFINED(RamSize) ? RamSize : 31M; - -/* This is needed for _CPU_ISR_install_vector - -* WARNING: it MUST match BSP_RAMBAR !!!!!!!!!!! */ -_VBR = 0x20000000; - -ENTRY(start) -STARTUP(start.o) - -/* - * Setup the memory map of the CSB360 board - * - * The "ram" section is placed in RAM after the space used by umon. - * - */ -MEMORY -{ - ram : ORIGIN = 0x00100000, LENGTH = 31M -} - -SECTIONS -{ - - /* - * Text, data and bss segments - */ - .text : - { - RamBase = .; - RamBase = .; - CREATE_OBJECT_SYMBOLS - *(.text*) - - /* - * C++ constructors/destructors - */ - *(.gnu.linkonce.t.*) - - /* - * Initialization and finalization code. - */ - . = ALIGN (16); - PROVIDE (_init = .); - *crti.o(.init) - *(.init) - *crtn.o(.init) - . = ALIGN (16); - PROVIDE (_fini = .); - *crti.o(.fini) - *(.fini) - *crtn.o(.fini) - - /* - * Special FreeBSD sysctl sections. - */ - . = ALIGN (16); - __start_set_sysctl_set = .; - *(set_sysctl_*); - __stop_set_sysctl_set = ABSOLUTE(.); - *(set_domain_*); - *(set_pseudo_*); - - /* - * C++ constructors/destructors - */ - . = ALIGN (16); - *crtbegin.o(.ctors) - *(.ctors) - *crtend.o(.ctors) - *crtbegin.o(.dtors) - *(.dtors) - *crtend.o(.dtors) - - /* - * Exception frame info - */ - . = ALIGN (16); - *(.eh_frame) - - /* - * Read-only data - */ - . = ALIGN (16); - _rodata_start = .; - *(.rodata*) - KEEP (*(SORT(.rtemsroset.*))) - *(.gnu.linkonce.r*) - - . = ALIGN (16); - PROVIDE (etext = .); - - } > ram - - .tdata : { - _TLS_Data_begin = .; - *(.tdata .tdata.* .gnu.linkonce.td.*) - _TLS_Data_end = .; - } >ram - - .tbss : { - _TLS_BSS_begin = .; - *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) - _TLS_BSS_end = .; - } >ram - - _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin; - _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin; - _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin; - _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin; - _TLS_Size = _TLS_BSS_end - _TLS_Data_begin; - _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss)); - - - .data : - { - copy_start = .; - *(.shdata) - . = ALIGN (0x10); - *(.data*) - KEEP (*(SORT(.rtemsrwset.*))) - . = ALIGN (0x10); - *(.gcc_exc) - *(.gcc_except_table*) - *(.jcr) - . = ALIGN (0x10); - *(.gnu.linkonce.d*) - . = ALIGN (0x10); - _edata = .; - copy_end = .; - } > ram - - .bss : - { - clear_start = . ; - *(.shbss) - *(.dynbss) - *(.bss* .gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(0x10); - _end = .; - - clear_end = .; - - WorkAreaBase = .; - WorkAreaBase = .; - - } > ram - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } - -} |