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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-10-27 15:29:18 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-10-27 15:29:18 +0000
commit702c5f5b42e975c35a94f1ae3d39a77815f36f70 (patch)
tree46a9caa5230280f7c51530aeeff50355f893083c /c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s
parentFirst attempt at icluding Eric Valette and Emmanuel Raguet. (diff)
downloadrtems-702c5f5b42e975c35a94f1ae3d39a77815f36f70.tar.bz2
The rxgen960 BSP and i960 RPM support was submitted by Mark Bronson
<mark@ramix.com> of RAMIX.
Diffstat (limited to 'c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s')
-rw-r--r--c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s50
1 files changed, 50 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s
new file mode 100644
index 0000000000..711c1a118d
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+++ b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.s
@@ -0,0 +1,50 @@
+#######################################
+# ihandler.s #
+# Last change : 8.11.94 #
+#######################################
+
+ .text
+ .globl _nmiHandler
+ .globl _intr5Handler
+ .globl _intr6Handler
+ .globl _clockHandler
+
+ .text
+
+# NMI Handler
+_nmiHandler :
+ ldconst 64, r4
+ addo sp, r4, sp
+
+ stq g0, -64(sp)
+ stq g4, -48(sp)
+ stq g8, -32(sp)
+ stt g12, -16(sp)
+
+ callx _nmi_isr
+
+ ldq -64(sp), g0
+ ldq -48(sp), g4
+ ldq -32(sp), g8
+ ldt -16(sp), g12
+
+ ret
+_clockHandler :
+ ldconst 64, r4
+ addo sp, r4, sp
+
+ stq g0, -64(sp)
+ stq g4, -48(sp)
+ stq g8, -32(sp)
+ stt g12, -16(sp)
+
+ callx _Clock_isr
+
+ ldq -64(sp), g0
+ ldq -48(sp), g4
+ ldq -32(sp), g8
+ ldt -16(sp), g12
+#
+#
+ ret
+