The rxgen960 BSP and i960 RPM support was submitted by Mark Bronson

<mark@ramix.com> of RAMIX.

4 files changed, 335 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/i960/rxgen960/include/Makefile.in b/c/src/lib/libbsp/i960/rxgen960/include/Makefile.in
new file mode 100644
index 0000000000..8cf95dc7c3
--- /dev/null
+++ b/c/src/lib/libbsp/i960/rxgen960/include/Makefile.in
@@ -0,0 +1,38 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+H_FILES = $(srcdir)/bsp.h $(srcdir)/coverhd.h
+
+#
+#  Equate files are for including from assembly preprocessed by
+#  gm4 or gasp.  No examples are provided except for those for
+#  other CPUs.  The best way to generate them would be to
+#  provide a program which generates the constants used based
+#  on the C equivalents.
+#
+#  If you add equate files, don't forget to uncomment the install line
+#  below.
+#
+
+EQ_FILES =
+
+SRCS=$(H_FILES) $(EQ_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all:	$(SRCS)
+	$(INSTALL) -m 444 $(H_FILES) $(PROJECT_INCLUDE)
+	$(INSTALL) -m 444 $(EQ_FILES) $(PROJECT_INCLUDE)/cpu
+
+install:  all
diff --git a/c/src/lib/libbsp/i960/rxgen960/include/bsp.h b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h
new file mode 100644
index 0000000000..a45e8221eb
--- /dev/null
+++ b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h
@@ -0,0 +1,166 @@
+/*  bsp.h
+ *
+ *  This include file contains some definitions specific to the
+ *  Ramix PMC901 board
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __PMC901_h
+#define __PMC901_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+#include <console.h>
+#include <clockdrv.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Following are for i960CA and are board independent
+ *
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 )
+
+#define Cause_tm27_intr()  i960_cause_intr( 0x62 )
+
+#define Clear_tm27_intr()  i960_clear_intr( 6 )
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp = 0; /* initialized to avoid warning */ \
+    asm volatile( "0: \
+                     remo      3,31,%0 ; \
+                     cmpo      0,%0 ; \
+                     subo      1,%1,%1 ; \
+                     cmpobne.t 0,%1,0b " \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+#define RAM_START 0xfed00000
+#define RAM_END   0xfef00000 /* this should actually be 16MB, most likely */
+
+/* NINDY console I/O requests:
+ *   CO sends a single character to stdout,
+ *   CI reads one.
+ */
+
+#define NINDY_INPUT   0
+#define NINDY_OUTPUT  1
+
+/*
+ *  get_prcb
+ *
+ *  Returns the PRCB pointer.
+ */
+
+static inline PRCB *get_prcb( void )
+{
+  register PRCB *_prcb = 0;
+
+  asm volatile( "calls 5; \
+                 mov   g0,%0" \
+                 : "=d" (_prcb) \
+                 : "0" (_prcb) );
+  return ( _prcb );
+}
+
+/*
+#ifdef C961_INIT
+#undef BSP_EXTERN
+#define BSP_EXTERN
+#else
+#undef BSP_EXTERN
+#define BSP_EXTERN extern
+#endif
+*/
+
+#undef BSP_EXTERN
+#define BSP_EXTERN
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+BSP_EXTERN PRCB          *Prcb;
+BSP_EXTERN CNTL_TBL      *Ctl_tbl;
+
+/*
+#if defined(i960ca)
+BSP_EXTERN i960ca_control_table *Ctl_tbl;
+#elif defined(i960rp)
+BSP_EXTERN i960rp_control_table *Ctl_tbl;
+#else
+#error "invalid processor selection!"
+#endif
+*/
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * How many libio files we want
+ */
+
+#define BSP_LIBIO_MAX_FDS       20
+
+/* functions */
+
+void bsp_cleanup( void );
+
+i960_isr_entry set_vector( rtems_isr_entry, unsigned int, unsigned int );
+i960_isr_entry set_tmr_vector( rtems_isr_entry, unsigned int, unsigned int );
+
+#ifdef __cplusplus
+}
+#endif
+
+#else
+#error "Did not get any definitions from here!"
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/i960/rxgen960/include/coverhd.h b/c/src/lib/libbsp/i960/rxgen960/include/coverhd.h
new file mode 100644
index 0000000000..e83f387c82
--- /dev/null
+++ b/c/src/lib/libbsp/i960/rxgen960/include/coverhd.h
@@ -0,0 +1,104 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        0
+#define CALLING_OVERHEAD_TASK_CREATE               0
+#define CALLING_OVERHEAD_TASK_IDENT                0
+#define CALLING_OVERHEAD_TASK_START                0
+#define CALLING_OVERHEAD_TASK_RESTART              0
+#define CALLING_OVERHEAD_TASK_DELETE               0
+#define CALLING_OVERHEAD_TASK_SUSPEND              0
+#define CALLING_OVERHEAD_TASK_RESUME               0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         0
+#define CALLING_OVERHEAD_TASK_MODE                 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE             0
+#define CALLING_OVERHEAD_TASK_SET_NOTE             0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            3
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           0
+#define CALLING_OVERHEAD_CLOCK_GET                 3
+#define CALLING_OVERHEAD_CLOCK_SET                 3
+#define CALLING_OVERHEAD_CLOCK_TICK                0
+
+#define CALLING_OVERHEAD_TIMER_CREATE              0
+#define CALLING_OVERHEAD_TIMER_IDENT               0
+#define CALLING_OVERHEAD_TIMER_DELETE              0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           6
+#define CALLING_OVERHEAD_TIMER_RESET               0
+#define CALLING_OVERHEAD_TIMER_CANCEL              0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       0
+
+#define CALLING_OVERHEAD_EVENT_SEND                0
+#define CALLING_OVERHEAD_EVENT_RECEIVE             0
+#define CALLING_OVERHEAD_SIGNAL_CATCH              0
+#define CALLING_OVERHEAD_SIGNAL_SEND               0
+#define CALLING_OVERHEAD_PARTITION_CREATE          0
+#define CALLING_OVERHEAD_PARTITION_IDENT           0
+#define CALLING_OVERHEAD_PARTITION_DELETE          0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   0
+#define CALLING_OVERHEAD_REGION_CREATE             0
+#define CALLING_OVERHEAD_REGION_IDENT              0
+#define CALLING_OVERHEAD_REGION_DELETE             0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     0
+#define CALLING_OVERHEAD_PORT_CREATE               0
+#define CALLING_OVERHEAD_PORT_IDENT                0
+#define CALLING_OVERHEAD_PORT_DELETE               0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             0
+#define CALLING_OVERHEAD_IO_OPEN                   0
+#define CALLING_OVERHEAD_IO_CLOSE                  0
+#define CALLING_OVERHEAD_IO_READ                   0
+#define CALLING_OVERHEAD_IO_WRITE                  0
+#define CALLING_OVERHEAD_IO_CONTROL                0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h b/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h
new file mode 100644
index 0000000000..009a0c4531
--- /dev/null
+++ b/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h
@@ -0,0 +1,27 @@
+/* PMC901 specific configuration values */

+#ifndef  __PMC901_CONFIG__

+#define __PMC901_CONFIG__

+/* The following define the PMC960 bus regions */

+/* Bus configuration */

+#define RP_CONFIG_REGS     BUS_WIDTH(32)

+#define FLASH              BUS_WIDTH(8)

+#define DRAM               BUS_WIDTH(32)

+#define UART_LED           BUS_WIDTH(8)

+#define DEFAULT            BUS_WIDTH(32)

+

+/* Region Configuration */

+#define  REGION_0_CONFIG      RP_CONFIG_REGS

+#define  REGION_2_CONFIG      DEFAULT

+#define  REGION_4_CONFIG      DEFAULT

+#define  REGION_6_CONFIG      DEFAULT

+#define  REGION_8_CONFIG      DEFAULT

+#define  REGION_A_CONFIG      DRAM

+#define  REGION_C_CONFIG      UART_LED

+#define  REGION_E_CONFIG      DEFAULT

+/* #define  REGION_BOOT_CONFIG   (FLASH | BYTE_ORDER)*/

+#define  REGION_BOOT_CONFIG   (DRAM)

+

+/* #define  DRAM_BASE	0xfed00000 */

+#define  DRAM_BASE	0xa0000000

+

+#endif