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authorChirayu Desai <cdesai@cyanogenmod.org>2013-12-23 23:49:00 +0530
committerGedare Bloom <gedare@rtems.org>2013-12-23 15:04:19 -0500
commit52943a24710905392c7d4375b204e36bcdd514d7 (patch)
tree6ec9e11ed419ae8240f1efed0cd568ea20890f04 /c/src/lib/libbsp/i386/shared/irq
parentlm32: Enhance Doxygen #2 (diff)
downloadrtems-52943a24710905392c7d4375b204e36bcdd514d7.tar.bz2
i386: shared: Add doxygen
Diffstat (limited to 'c/src/lib/libbsp/i386/shared/irq')
-rw-r--r--c/src/lib/libbsp/i386/shared/irq/apic.h19
-rw-r--r--c/src/lib/libbsp/i386/shared/irq/irq.h31
-rw-r--r--c/src/lib/libbsp/i386/shared/irq/irq_asm.h22
3 files changed, 54 insertions, 18 deletions
diff --git a/c/src/lib/libbsp/i386/shared/irq/apic.h b/c/src/lib/libbsp/i386/shared/irq/apic.h
index 063d27422c..9ae103b963 100644
--- a/c/src/lib/libbsp/i386/shared/irq/apic.h
+++ b/c/src/lib/libbsp/i386/shared/irq/apic.h
@@ -1,3 +1,9 @@
+/**
+ * @file
+ * @ingroup i386_apic
+ * @brief Local and I/O APIC definitions
+ */
+
/*
* Author: Erich Boleyn <erich@uruk.org>
* http://www.uruk.org/~erich/
@@ -27,6 +33,13 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+/**
+ * @defgroup i386_apci
+ * @ingroup i386_pci
+ * @brief Intel Architecture local and I/O APIC definitions
+ * @{
+ */
+
/*
* Header file for Intel Architecture local and I/O APIC definitions.
*
@@ -58,10 +71,10 @@
/*
* Shared defines for I/O and local APIC definitions
*/
-/* APIC version register */
+/** @brief APIC version register */
#define APIC_VERSION(x) ((x) & 0xFF)
#define APIC_MAXREDIR(x) (((x) >> 16) & 0xFF)
-/* APIC id register */
+/** @brief APIC id register */
#define APIC_ID(x) ((x) >> 24)
#define APIC_VER_NEW 0x10
@@ -108,3 +121,5 @@
#define LAPIC_TDCR 0x3E0
#endif /* _APIC_H */
+
+/** @} */
diff --git a/c/src/lib/libbsp/i386/shared/irq/irq.h b/c/src/lib/libbsp/i386/shared/irq/irq.h
index 643962786b..e176495436 100644
--- a/c/src/lib/libbsp/i386/shared/irq/irq.h
+++ b/c/src/lib/libbsp/i386/shared/irq/irq.h
@@ -1,3 +1,9 @@
+/**
+ * @file
+ * @ingroup i386_irq
+ * @brief Interrupt handlers
+ */
+
/* irq.h
*
* This include file describe the data structure and the functions implemented
@@ -16,6 +22,13 @@
* http://www.rtems.com/license/LICENSE.
*/
+/**
+ * @defgroup i386_irq Interrupt handlers
+ * @ingroup i386_shared
+ * @brief Data structure and the functions to write interrupt handlers
+ * @{
+ */
+
#ifndef _IRQ_H_
#define _IRQ_H_
@@ -23,7 +36,7 @@
extern "C" {
#endif
-/*
+/** @brief
* Include some preprocessor value also used by assember code
*/
@@ -37,13 +50,13 @@ extern "C" {
| Constants
+--------------------------------------------------------------------------*/
- /* Base vector for our IRQ handlers. */
+ /** @brief Base vector for our IRQ handlers. */
#define BSP_IRQ_VECTOR_BASE BSP_ASM_IRQ_VECTOR_BASE
#define BSP_IRQ_LINES_NUMBER 17
#define BSP_LOWEST_OFFSET 0
#define BSP_MAX_ON_i8259S (BSP_IRQ_LINES_NUMBER - 2)
#define BSP_MAX_OFFSET (BSP_IRQ_LINES_NUMBER - 1)
- /*
+ /** @brief
* Interrupt offset in comparison to BSP_ASM_IRQ_VECTOR_BASE
* NB : 1) Interrupt vector number in IDT = offset + BSP_ASM_IRQ_VECTOR_BASE
* 2) The same name should be defined on all architecture
@@ -62,7 +75,7 @@ extern "C" {
#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET
#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET
-/*
+/** @brief
* Type definition for RTEMS managed interrupts
*/
typedef unsigned short rtems_i8259_masks;
@@ -76,19 +89,19 @@ extern rtems_i8259_masks i8259s_cache;
* ------------------------ Intel 8259 (or emulation) Mngt Routines -------
*/
-/*
+/** @brief
* function to disable a particular irq at 8259 level. After calling
* this function, even if the device asserts the interrupt line it will
* not be propagated further to the processor
*/
int BSP_irq_disable_at_i8259s (const rtems_irq_number irqLine);
-/*
+/** @brief
* function to enable a particular irq at 8259 level. After calling
* this function, if the device asserts the interrupt line it will
* be propagated further to the processor
*/
int BSP_irq_enable_at_i8259s (const rtems_irq_number irqLine);
-/*
+/** @brief
* function to acknoledge a particular irq at 8259 level. After calling
* this function, if a device asserts an enabled interrupt line it will
* be propagated further to the processor. Mainly usefull for people
@@ -96,11 +109,13 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_number irqLine);
* handlers.
*/
int BSP_irq_ack_at_i8259s (const rtems_irq_number irqLine);
-/*
+/** @brief
* function to check if a particular irq is enabled at 8259 level. After calling
*/
int BSP_irq_enabled_at_i8259s (const rtems_irq_number irqLine);
+/** @} */
+
#ifdef __cplusplus
}
#endif
diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.h b/c/src/lib/libbsp/i386/shared/irq/irq_asm.h
index a2d9d16380..455e6a344c 100644
--- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.h
+++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.h
@@ -1,3 +1,9 @@
+/**
+ * @file
+ * @ingroup i386_irq
+ * @brief
+ */
+
/* irq_asm.h
*
* This include file has defines to represent some contant used
@@ -14,14 +20,14 @@
#define __IRQ_ASM_H__
#define BSP_ASM_IRQ_VECTOR_BASE 0x20
- /* PIC's command and mask registers */
-#define PIC_MASTER_COMMAND_IO_PORT 0x20 /* Master PIC command register */
-#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 /* Slave PIC command register */
-#define PIC_MASTER_IMR_IO_PORT 0x21 /* Master PIC Interrupt Mask Register */
-#define PIC_SLAVE_IMR_IO_PORT 0xa1 /* Slave PIC Interrupt Mask Register */
+ /** @brief PIC's command and mask registers */
+#define PIC_MASTER_COMMAND_IO_PORT 0x20 ///< Master PIC command register
+#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 ///< Slave PIC command register
+#define PIC_MASTER_IMR_IO_PORT 0x21 ///< Master PIC Interrupt Mask Register
+#define PIC_SLAVE_IMR_IO_PORT 0xa1 ///< Slave PIC Interrupt Mask Register
- /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
-#define PIC_EOSI 0x60 /* End of Specific Interrupt (EOSI) */
-#define PIC_EOI 0x20 /* Generic End of Interrupt (EOI) */
+ /** @brief Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
+#define PIC_EOSI 0x60 ///< End of Specific Interrupt (EOSI)
+#define PIC_EOI 0x20 ///< Generic End of Interrupt (EOI)
#endif