diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-12-14 23:15:38 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-12-14 23:15:38 +0000 |
commit | 01629105c2817a59a4f1f05039593f211cf5ddaa (patch) | |
tree | 76f6bb8f9ca6ddbd015e3b81964a8dacffaf5cf9 /c/src/lib/libbsp/i386/force386/startup/ldsegs.S | |
parent | Patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de> to rename all (diff) | |
download | rtems-01629105c2817a59a4f1f05039593f211cf5ddaa.tar.bz2 |
Patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de> to rename all
.s files to .S in conformance with GNU conventions. This is a
minor step along the way to supporting automake.
Diffstat (limited to 'c/src/lib/libbsp/i386/force386/startup/ldsegs.S')
-rw-r--r-- | c/src/lib/libbsp/i386/force386/startup/ldsegs.S | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/i386/force386/startup/ldsegs.S b/c/src/lib/libbsp/i386/force386/startup/ldsegs.S new file mode 100644 index 0000000000..7689a7693f --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/startup/ldsegs.S @@ -0,0 +1,86 @@ +/* _load_segments + * + * This file assists the board independent startup code by + * loading the proper segment register values. The values + * loaded are board dependent. + * + * NOTE: No stack has been established when this routine + * is invoked. It returns by jumping back to bspentry. + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + +/* + * FORCEBUG loads us into a virtual address space which + * really starts at PHYSICAL_ADDRESS_BASE. + */ + +.set PHYSICAL_ADDRESS_BASE, 0x00002000 + +/* + * At reset time, FORCEBUG normally has the segment selectors preloaded. + * If a human resets the instruction pointer, this will not have occurred. + * However, no guarantee can be made of the other registers if cs:ip was + * modified to restart the program. Because of this, the BSP reloads all + * segment registers (except cs) with the values they have following + * a reset. + */ + + +.set RESET_SS, 0x40 # initial value of stack segment register +.set RESET_DS, 0x40 # initial value of data segment register +.set RESET_ES, 0x40 # initial value of extra segment register +.set RESET_FS, 0x40 # initial value of "f" segment register +.set RESET_GS, 0x30 # initial value of "g" segment register + + +#define LOAD_SEGMENTS(_value,_segment) \ + movw $ ## _value, ax ; \ + movw ax, _segment + + EXTERN (establish_stack) + + PUBLIC (_load_segments) +SYM (_load_segments): + LOAD_SEGMENTS( RESET_SS, ss ) + LOAD_SEGMENTS( RESET_DS, ds ) + LOAD_SEGMENTS( RESET_ES, es ) + LOAD_SEGMENTS( RESET_FS, fs ) + LOAD_SEGMENTS( RESET_GS, gs ) + + jmp SYM (_establish_stack) # return to the bsp entry code + + PUBLIC (_return_to_monitor) +SYM (_return_to_monitor): + + call SYM (Clock_exit) + movb $0,al + int $0x20 # restart FORCEbug + jmp SYM (start) # FORCEbug does not reset PC + +END_CODE + +BEGIN_DATA + + PUBLIC (_Do_Load_IDT) +SYM (_Do_Load_IDT): + .byte 1 + + PUBLIC (_Do_Load_GDT) +SYM (_Do_Load_GDT): + .byte 0 + +END_DATA +END |