Support for NXP LPC1700 family

22 files changed, 676 insertions, 30 deletions

diff --git a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
index 971a20e42d..1abe3b249f 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
+++ b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
@@ -66,6 +66,8 @@ project_lib_DATA = start.$(OBJEXT)
 
 project_lib_DATA += startup/linkcmds
 EXTRA_DIST = 
+EXTRA_DIST += startup/linkcmds.lpc17xx_ea_ram
+EXTRA_DIST += startup/linkcmds.lpc17xx_ea_rom_int
 EXTRA_DIST += startup/linkcmds.lpc2362
 EXTRA_DIST += startup/linkcmds.lpc23xx_tli800
 EXTRA_DIST += startup/linkcmds.lpc24xx_ea
@@ -151,6 +153,7 @@ libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
 libbsp_a_SOURCES += startup/bspstarthooks.c
 libbsp_a_SOURCES += startup/start-config-emc-dynamic.c
 libbsp_a_SOURCES += startup/start-config-emc-static.c
+libbsp_a_SOURCES += startup/start-config-mpu.c
 libbsp_a_SOURCES += startup/start-config-pinsel.c
 
 ###############################################################################
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
index c96406d6b0..cd63737e81 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -41,6 +41,8 @@ extern "C" {
 
 #define LPC24XX_EMCCLK (LPC24XX_CCLK / LPC24XX_EMCCLKDIV)
 
+#define LPC24XX_MPU_REGION_COUNT 8
+
 #ifndef ASM
 
 struct rtems_bsdnet_ifconfig;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/io.h b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
index b40bfdde6b..f798f54768 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/io.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2009-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -72,15 +72,24 @@ typedef enum {
   LPC24XX_MODULE_I2S,
   LPC24XX_MODULE_LCD,
   LPC24XX_MODULE_MCI,
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_MCPWM,
+  #endif
   LPC24XX_MODULE_PCB,
   LPC24XX_MODULE_PWM_0,
   LPC24XX_MODULE_PWM_1,
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_QEI,
+  #endif
   LPC24XX_MODULE_RTC,
   #ifdef ARM_MULTILIB_ARCH_V4
     LPC24XX_MODULE_SPI,
   #endif
   LPC24XX_MODULE_SSP_0,
   LPC24XX_MODULE_SSP_1,
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_SSP_2,
+  #endif
   LPC24XX_MODULE_SYSCON,
   LPC24XX_MODULE_TIMER_0,
   LPC24XX_MODULE_TIMER_1,
@@ -90,6 +99,9 @@ typedef enum {
   LPC24XX_MODULE_UART_1,
   LPC24XX_MODULE_UART_2,
   LPC24XX_MODULE_UART_3,
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_UART_4,
+  #endif
   #ifdef ARM_MULTILIB_ARCH_V4
     LPC24XX_MODULE_WDT,
   #endif
@@ -115,6 +127,14 @@ typedef enum {
   LPC24XX_GPIO_RESISTOR_NONE = 0x1U,
   LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x2U,
   LPC24XX_GPIO_INPUT = 0x0U,
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC17XX_GPIO_REPEATER = 0x3U,
+    LPC17XX_GPIO_HYSTERESIS = IOCON_HYS,
+    LPC17XX_GPIO_INPUT_INVERT = IOCON_INV,
+    LPC17XX_GPIO_FAST_MODE = IOCON_SLEW,
+    LPC17XX_GPIO_OPEN_DRAIN = IOCON_OD,
+    LPC17XX_GPIO_INPUT_FILTER = IOCON_FILTER,
+  #endif
   LPC24XX_GPIO_OUTPUT = 0x8000U
 } lpc24xx_gpio_settings;
 
@@ -226,6 +246,11 @@ typedef enum {
   #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f0, t, 0 } }
   #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
     { { p, i, f0, 0, 0 } }, { { p, j, f0, 0, 1 } }
+#else
+  #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f1, 0, 0 } }
+  #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f1, t, 0 } }
+  #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
+    { { p, i, f1, 0, 0 } }, { { p, j, f1, 0, 1 } }
 #endif
 
 #define LPC24XX_PIN_TERMINAL { { 0x7, 0x1f, 0x7, 0xf, 0x1 } }
@@ -796,6 +821,27 @@ rtems_status_code lpc24xx_pin_config(
 
 /** @} */
 
+#ifdef ARM_MULTILIB_ARCH_V4
+
+/**
+ * @name SPI Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SPI_SCK \
+  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_SSEL \
+  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MISO \
+  LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MOSI \
+  LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
+
 /**
  * @name SSP 0 Pins
  *
@@ -868,6 +914,30 @@ rtems_status_code lpc24xx_pin_config(
 
 /** @} */
 
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name SSP 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_2_SCK_P1_0 \
+  LPC24XX_PIN(1, 0, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_SSEL_P1_8 \
+  LPC24XX_PIN(1, 8, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MISO_P1_4 \
+  LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MOSI_P1_1 \
+  LPC24XX_PIN(1, 1, LPC24XX_PIN_FUNCTION_00, 4)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
 /**
  * @name UART 0 Pins
  *
@@ -948,6 +1018,36 @@ rtems_status_code lpc24xx_pin_config(
 
 /** @} */
 
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name UART 4 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_4_TXD_P0_22 \
+  LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_TXD_P1_29 \
+  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_00, 5)
+#define LPC24XX_PIN_UART_4_TXD_P5_4 \
+  LPC24XX_PIN(5, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_RXD_P2_9 \
+  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_RXD_P5_3 \
+  LPC24XX_PIN(5, 3, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_OE_P0_21 \
+  LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 3)
+
+#define LPC24XX_PIN_UART_4_SCLK_P0_21 \
+  LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 5)
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
+/** @} */
+
 /**
  * @name USB Port 1 Pins
  *
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
index d82946d35d..60fdb34b8e 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -72,11 +72,56 @@
   #define LPC24XX_IRQ_I2S 31
 
   #define BSP_INTERRUPT_VECTOR_MAX 31
+#else
+  #define LPC24XX_IRQ_WDT 0
+  #define LPC24XX_IRQ_TIMER_0 1
+  #define LPC24XX_IRQ_TIMER_1 2
+  #define LPC24XX_IRQ_TIMER_2 3
+  #define LPC24XX_IRQ_TIMER_3 4
+  #define LPC24XX_IRQ_UART_0 5
+  #define LPC24XX_IRQ_UART_1 6
+  #define LPC24XX_IRQ_UART_2 7
+  #define LPC24XX_IRQ_UART_3 8
+  #define LPC24XX_IRQ_PWM_1 9
+  #define LPC24XX_IRQ_I2C_0 10
+  #define LPC24XX_IRQ_I2C_1 11
+  #define LPC24XX_IRQ_I2C_2 12
+  #define LPC24XX_IRQ_SPI_SSP_0 14
+  #define LPC24XX_IRQ_SSP_1 15
+  #define LPC24XX_IRQ_PLL 16
+  #define LPC24XX_IRQ_RTC 17
+  #define LPC24XX_IRQ_EINT_0 18
+  #define LPC24XX_IRQ_EINT_1 19
+  #define LPC24XX_IRQ_EINT_2 20
+  #define LPC24XX_IRQ_EINT_3 21
+  #define LPC24XX_IRQ_ADC_0 22
+  #define LPC24XX_IRQ_BOD 23
+  #define LPC24XX_IRQ_USB 24
+  #define LPC24XX_IRQ_CAN 25
+  #define LPC24XX_IRQ_DMA 26
+  #define LPC24XX_IRQ_I2S 27
+  #define LPC24XX_IRQ_ETHERNET 28
+  #define LPC24XX_IRQ_SD_MMC 29
+  #define LPC24XX_IRQ_MCPWM 30
+  #define LPC24XX_IRQ_QEI 31
+  #define LPC24XX_IRQ_PLL_ALT 32
+  #define LPC24XX_IRQ_USB_ACTIVITY 33
+  #define LPC24XX_IRQ_CAN_ACTIVITY 34
+  #define LPC24XX_IRQ_UART_4 35
+  #define LPC24XX_IRQ_SSP_2 36
+  #define LPC24XX_IRQ_LCD 37
+  #define LPC24XX_IRQ_GPIO 38
+  #define LPC24XX_IRQ_PWM 39
+  #define LPC24XX_IRQ_EEPROM 40
+
+  #define BSP_INTERRUPT_VECTOR_MAX 40
 #endif
 
 #define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
 #ifdef ARM_MULTILIB_ARCH_V4
   #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+#else
+  #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 31
 #endif
 #define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
 #define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h b/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
index 08f5a4476a..06ec86db3f 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2010-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -52,6 +52,16 @@ typedef enum {
     LCD_MODE_TFT_16_BIT_1_5_5_5,
     LCD_MODE_TFT_24_BIT,
     LCD_MODE_DISABLED
+  #else
+    LCD_MODE_STN_4_BIT = 0x4,
+    LCD_MODE_STN_8_BIT = 0x6,
+    LCD_MODE_STN_DUAL_PANEL_4_BIT = 0x84,
+    LCD_MODE_STN_DUAL_PANEL_8_BIT = 0x86,
+    LCD_MODE_TFT_12_BIT_4_4_4 = 0x2e,
+    LCD_MODE_TFT_16_BIT_5_6_5 = 0x2c,
+    LCD_MODE_TFT_16_BIT_1_5_5_5 = 0x28,
+    LCD_MODE_TFT_24_BIT = 0x2a,
+    LCD_MODE_DISABLED = 0xff
   #endif
 } lpc24xx_lcd_mode;
 
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
index 3002b59a89..906ea1622a 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -25,6 +25,8 @@
 #ifndef LIBBSP_ARM_LPC24XX_START_CONFIG_H
 #define LIBBSP_ARM_LPC24XX_START_CONFIG_H
 
+#include <rtems/score/armv7m.h>
+
 #include <bsp.h>
 #include <bsp/io.h>
 #include <bsp/start.h>
@@ -90,6 +92,9 @@ extern BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
 extern BSP_START_DATA_SECTION const size_t
   lpc24xx_start_config_emc_static_chip_count;
 
+extern BSP_START_DATA_SECTION const ARMV7M_MPU_Region
+  lpc24xx_start_config_mpu_regions [LPC24XX_MPU_REGION_COUNT];
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c b/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
index 440984eb2c..94c346c76d 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -44,5 +44,12 @@ void bsp_interrupt_dispatch(void)
 
     /* Acknowledge interrupt */
     VICVectAddr = 0;
+  #else
+    rtems_vector_number vector =
+      ARMV7M_SCB_ICSR_VECTACTIVE_GET(_ARMV7M_SCB->icsr);
+
+    _ARMV7M_Interrupt_service_enter();
+    bsp_interrupt_handler_dispatch(ARMV7M_IRQ_OF_VECTOR(vector));
+    _ARMV7M_Interrupt_service_leave();
   #endif
 }
diff --git a/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c b/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
index d6cc6ce17d..db09899fbb 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -42,6 +42,8 @@ void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority)
 
     #ifdef ARM_MULTILIB_ARCH_V4
       VICVectPriorityBase [vector] = priority;
+    #else
+      _ARMV7M_NVIC_Set_priority((int) vector, (int) (priority << 3));
     #endif
   }
 }
@@ -51,6 +53,8 @@ unsigned lpc24xx_irq_get_priority(rtems_vector_number vector)
   if (lpc24xx_irq_is_valid(vector)) {
     #ifdef ARM_MULTILIB_ARCH_V4
       return VICVectPriorityBase [vector];
+    #else
+      return (unsigned) (_ARMV7M_NVIC_Get_priority((int) vector) >> 3);
     #endif
   } else {
     return LPC24XX_IRQ_PRIORITY_VALUE_MIN - 1U;
@@ -61,6 +65,8 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   #ifdef ARM_MULTILIB_ARCH_V4
     VICIntEnable = 1U << vector;
+  #else
+    _ARMV7M_NVIC_Set_enable((int) vector);
   #endif
 
   return RTEMS_SUCCESSFUL;
@@ -70,6 +76,8 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
   #ifdef ARM_MULTILIB_ARCH_V4
     VICIntEnClear = 1U << vector;
+  #else
+    _ARMV7M_NVIC_Clear_enable((int) vector);
   #endif
 
   return RTEMS_SUCCESSFUL;
@@ -113,6 +121,25 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
 
     /* Install the IRQ exception handler */
     _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
+  #else
+    rtems_vector_number i = 0;
+    ARMV7M_Exception_handler *vector_table =
+      (ARMV7M_Exception_handler *) bsp_vector_table_begin;
+
+    memcpy(
+      vector_table,
+      bsp_start_vector_table_begin,
+      (size_t) bsp_vector_table_size
+    );
+
+    for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
+      vector_table [ARMV7M_VECTOR_IRQ(i)] = bsp_interrupt_dispatch;
+      _ARMV7M_NVIC_Clear_enable(i);
+      _ARMV7M_NVIC_Clear_pending(i);
+      lpc24xx_irq_set_priority(i, LPC24XX_IRQ_PRIORITY_VALUE_MAX - 1);
+    }
+
+    _ARMV7M_SCB->vtor = vector_table;
   #endif
 
   return RTEMS_SUCCESSFUL;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx.inc b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx.inc
new file mode 100644
index 0000000000..13f2161356
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx.inc
@@ -0,0 +1,11 @@
+#
+# Config file for LPC17XX.
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CPU_CFLAGS = -march=armv7-m -mthumb
+
+CFLAGS_OPTIMIZE_V = -O2 -g
diff --git a/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_ram.cfg b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_ram.cfg
new file mode 100644
index 0000000000..caaaf07639
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_ram.cfg
@@ -0,0 +1,5 @@
+#
+# Config file for LPC1788 OEM Board from Embedded Artists.
+#
+
+include $(RTEMS_ROOT)/make/custom/lpc17xx.inc
diff --git a/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_rom_int.cfg b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_rom_int.cfg
new file mode 100644
index 0000000000..caaaf07639
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_ea_rom_int.cfg
@@ -0,0 +1,5 @@
+#
+# Config file for LPC1788 OEM Board from Embedded Artists.
+#
+
+include $(RTEMS_ROOT)/make/custom/lpc17xx.inc
diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/io.c b/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
index 0482b0335b..dce26c5bbb 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2009-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -60,6 +60,42 @@ rtems_status_code lpc24xx_gpio_config(
         default:
           return RTEMS_INVALID_NUMBER;
       }
+    #else
+      uint32_t iocon_mask = IOCON_HYS | IOCON_INV
+        | IOCON_SLEW | IOCON_OD | IOCON_FILTER;
+      uint32_t iocon = (settings & iocon_mask) | IOCON_ADMODE;
+      uint32_t iocon_invalid = settings & ~(iocon_mask | LPC24XX_GPIO_OUTPUT);
+
+      /* Get resistor flags */
+      switch (resistor) {
+        case LPC24XX_GPIO_RESISTOR_NONE:
+          resistor = IOCON_MODE(0);
+          break;
+        case LPC24XX_GPIO_RESISTOR_PULL_DOWN:
+          resistor = IOCON_MODE(1);
+          break;
+        case LPC24XX_GPIO_RESISTOR_PULL_UP:
+          resistor = IOCON_MODE(2);
+          break;
+        case LPC17XX_GPIO_HYSTERESIS:
+          resistor = IOCON_MODE(3);
+          break;
+      }
+      iocon |= resistor;
+
+      if (iocon_invalid != 0) {
+        return RTEMS_INVALID_NUMBER;
+      }
+
+      if (output && (settings & LPC17XX_GPIO_INPUT_INVERT) != 0) {
+        return RTEMS_INVALID_NUMBER;
+      }
+
+      if ((settings & LPC17XX_GPIO_INPUT_FILTER) == 0) {
+        iocon |= IOCON_FILTER;
+      } else {
+        iocon &= ~IOCON_FILTER;
+      }
     #endif
 
     rtems_interrupt_disable(level);
@@ -69,6 +105,8 @@ rtems_status_code lpc24xx_gpio_config(
       LPC24XX_PINMODE [select] =
         (LPC24XX_PINMODE [select] & ~(LPC24XX_PIN_SELECT_MASK << shift))
           | ((resistor & LPC24XX_PIN_SELECT_MASK) << shift);
+    #else
+      LPC17XX_IOCON [index] = iocon;
     #endif
 
     rtems_interrupt_flash(level);
@@ -127,15 +165,24 @@ static const lpc24xx_module_entry lpc24xx_module_table [] = {
     LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_LCD, 1, 0, 0),
   #endif
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_MCI, 1, 1, 28),
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_MCPWM, 1, 1, 17),
+  #endif
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_PCB, 0, 1, 18),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_PWM_0, 1, 1, 5),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_PWM_1, 1, 1, 6),
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_QEI, 1, 1, 18),
+  #endif
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_RTC, 1, 1, 9),
   #ifdef ARM_MULTILIB_ARCH_V4
     LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SPI, 1, 1, 8),
   #endif
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 21),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SSP_1, 1, 1, 10),
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SSP_2, 1, 1, 20),
+  #endif
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SYSCON, 0, 1, 30),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_TIMER_0, 1, 1, 1),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_TIMER_1, 1, 1, 2),
@@ -145,6 +192,9 @@ static const lpc24xx_module_entry lpc24xx_module_table [] = {
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_1, 1, 1, 4),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_2, 1, 1, 24),
   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_3, 1, 1, 25),
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_4, 1, 1, 8),
+  #endif
   #ifdef ARM_MULTILIB_ARCH_V4
     LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_WDT, 0, 1, 0),
   #endif
@@ -161,6 +211,9 @@ static rtems_status_code lpc24xx_module_do_enable(
   bool has_power = false;
   bool has_clock = false;
   unsigned index = 0;
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+  #endif
 
   if ((unsigned) module >= LPC24XX_MODULE_COUNT) {
       return RTEMS_INVALID_ID;
@@ -182,6 +235,10 @@ static rtems_status_code lpc24xx_module_do_enable(
     if ((clock & ~LPC24XX_MODULE_CLOCK_MASK) != 0U) {
       return RTEMS_INVALID_CLOCK;
     }
+  #else
+    if (clock != LPC24XX_MODULE_PCLK_DEFAULT) {
+      return RTEMS_INVALID_CLOCK;
+    }
   #endif
 
   has_power = lpc24xx_module_table [module].power;
@@ -194,6 +251,8 @@ static rtems_status_code lpc24xx_module_do_enable(
       rtems_interrupt_disable(level);
       #ifdef ARM_MULTILIB_ARCH_V4
         PCONP |= 1U << index;
+      #else
+        scb->pconp |= 1U << index;
       #endif
       rtems_interrupt_enable(level);
     }
@@ -229,6 +288,9 @@ static rtems_status_code lpc24xx_module_do_enable(
         }
 
         USBCLKCFG = usbsel;
+      #else
+        /* FIXME */
+        scb->usbclksel = 0;
       #endif
     }
   } else {
@@ -236,6 +298,8 @@ static rtems_status_code lpc24xx_module_do_enable(
       rtems_interrupt_disable(level);
       #ifdef ARM_MULTILIB_ARCH_V4
         PCONP &= ~(1U << index);
+      #else
+        scb->pconp &= ~(1U << index);
       #endif
       rtems_interrupt_enable(level);
     }
@@ -264,6 +328,9 @@ typedef rtems_status_code (*lpc24xx_pin_visitor)(
     volatile uint32_t *pinsel,
     uint32_t pinsel_mask,
     uint32_t pinsel_value,
+  #else
+    volatile uint32_t *iocon,
+    lpc24xx_pin_range pin_range,
   #endif
   volatile uint32_t *fio_dir,
   uint32_t fio_bit
@@ -275,6 +342,9 @@ lpc24xx_pin_set_function(
     volatile uint32_t *pinsel,
     uint32_t pinsel_mask,
     uint32_t pinsel_value,
+  #else
+    volatile uint32_t *iocon,
+    lpc24xx_pin_range pin_range,
   #endif
   volatile uint32_t *fio_dir,
   uint32_t fio_bit
@@ -286,6 +356,9 @@ lpc24xx_pin_set_function(
     rtems_interrupt_disable(level);
     *pinsel = (*pinsel & ~pinsel_mask) | pinsel_value;
     rtems_interrupt_enable(level);
+  #else
+    /* TODO */
+    *iocon = IOCON_FUNC(pin_range.fields.function);
   #endif
 
   return RTEMS_SUCCESSFUL;
@@ -296,6 +369,9 @@ static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_function(
     volatile uint32_t *pinsel,
     uint32_t pinsel_mask,
     uint32_t pinsel_value,
+  #else
+    volatile uint32_t *iocon,
+    lpc24xx_pin_range pin_range,
   #endif
   volatile uint32_t *fio_dir,
   uint32_t fio_bit
@@ -307,6 +383,9 @@ static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_function(
     } else {
       return RTEMS_IO_ERROR;
     }
+  #else
+    /* TODO */
+    return RTEMS_IO_ERROR;
   #endif
 }
 
@@ -316,6 +395,9 @@ lpc24xx_pin_set_input(
     volatile uint32_t *pinsel,
     uint32_t pinsel_mask,
     uint32_t pinsel_value,
+  #else
+    volatile uint32_t *iocon,
+    lpc24xx_pin_range pin_range,
   #endif
   volatile uint32_t *fio_dir,
   uint32_t fio_bit
@@ -327,6 +409,8 @@ lpc24xx_pin_set_input(
   *fio_dir &= ~fio_bit;
   #ifdef ARM_MULTILIB_ARCH_V4
     *pinsel &= ~pinsel_mask;
+  #else
+    *iocon = IOCON_MODE(2) | IOCON_ADMODE | IOCON_FILTER;
   #endif
   rtems_interrupt_enable(level);
 
@@ -338,6 +422,9 @@ static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_input(
     volatile uint32_t *pinsel,
     uint32_t pinsel_mask,
     uint32_t pinsel_value,
+  #else
+    volatile uint32_t *iocon,
+    lpc24xx_pin_range pin_range,
   #endif
   volatile uint32_t *fio_dir,
   uint32_t fio_bit
@@ -349,6 +436,8 @@ static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_input(
   if (is_input) {
     #ifdef ARM_MULTILIB_ARCH_V4
       bool is_gpio = (*pinsel & pinsel_mask) == 0;
+    #else
+      bool is_gpio = IOCON_FUNC_GET(*iocon) == 0;
     #endif
 
     if (is_gpio) {
@@ -405,6 +494,10 @@ BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_config(
           uint32_t pinsel_value = (function & LPC24XX_PIN_SELECT_MASK) << shift;
 
           sc = (*visitor)(pinsel, pinsel_mask, pinsel_value, fio_dir, fio_bit);
+        #else
+          volatile uint32_t *iocon = &LPC17XX_IOCON [index];
+
+          sc = (*visitor)(iocon, pin_range, fio_dir, fio_bit);
         #endif
 
         ++port_bit;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c b/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c
index 832279bee0..8044a612d2 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2010-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -110,5 +110,13 @@ lpc24xx_lcd_mode lpc24xx_lcd_current_mode(void)
     } else {
       return LCD_MODE_DISABLED;
     }
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+
+    if ((scb->pconp & LPC17XX_SCB_PCONP_LCD) != 0) {
+      return LCD_CTRL & 0xae;
+    } else {
+      return LCD_MODE_DISABLED;
+    }
   #endif
 }
diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/restart.c b/c/src/lib/libbsp/arm/lpc24xx/misc/restart.c
index e82a6edd79..c37947855c 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/misc/restart.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/misc/restart.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -41,5 +41,11 @@ void bsp_restart(void *addr)
       : ARM_SWITCH_OUTPUT
       : [addr] "r" (addr)
     );
+  #else
+    rtems_interrupt_level level;
+    void (*start)(void) = addr;
+
+    rtems_interrupt_disable(level);
+    (*start)();
   #endif
 }
diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c b/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
index 30adcf2ba5..b73181024e 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -74,6 +74,15 @@ void lpc24xx_micro_seconds_delay(unsigned us)
   } while (elapsed < delay);
 }
 
+#ifdef ARM_MULTILIB_ARCH_V7M
+  unsigned lpc17xx_sysclk(unsigned clksrcsel)
+  {
+    return (clksrcsel & LPC17XX_SCB_CLKSRCSEL_CLKSRC) != 0 ?
+      LPC24XX_OSCILLATOR_MAIN
+        : LPC24XX_OSCILLATOR_INTERNAL;
+  }
+#endif
+
 unsigned lpc24xx_pllclk(void)
 {
   #ifdef ARM_MULTILIB_ARCH_V4
@@ -106,6 +115,19 @@ unsigned lpc24xx_pllclk(void)
     } else {
       pllclk = pllinclk;
     }
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+    unsigned sysclk = lpc17xx_sysclk(scb->clksrcsel);
+    unsigned pllstat = scb->pll_0.stat;
+    unsigned pllclk = 0;
+    unsigned enabled_and_locked = LPC17XX_PLL_STAT_PLLE
+      | LPC17XX_PLL_STAT_PLOCK;
+
+    if ((pllstat & enabled_and_locked) == enabled_and_locked) {
+      unsigned m = LPC17XX_PLL_SEL_MSEL_GET(pllstat) + 1;
+
+      pllclk = sysclk * m;
+    }
   #endif
 
   return pllclk;
@@ -119,6 +141,19 @@ unsigned lpc24xx_cclk(void)
 
     /* Get CPU frequency */
     unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL(CCLKCFG) + 1);
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+    unsigned cclksel = scb->cclksel;
+    unsigned cclk_in = 0;
+    unsigned cclk = 0;
+
+    if ((cclksel & LPC17XX_SCB_CCLKSEL_CCLKSEL) != 0) {
+      cclk_in = lpc24xx_pllclk();
+    } else {
+      cclk_in = lpc17xx_sysclk(scb->clksrcsel);
+    }
+
+    cclk = cclk_in / LPC17XX_SCB_CCLKSEL_CCLKDIV_GET(cclksel);
   #endif
 
   return cclk;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
index 601ad69b13..d7bbc897c2 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
@@ -7,15 +7,17 @@
  */
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * rtems@embedded-brains.de
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
- * The license and distribution terms for this file may be found in the file
- * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
  */
 
 #include <rtems.h>
@@ -37,6 +39,8 @@ BSP_START_TEXT_SECTION __attribute__((flatten)) void bsp_reset(void)
     WDMOD = 0x3;
     WDFEED = 0xaa;
     WDFEED = 0x55;
+  #else
+    printk("reset\n");
   #endif
 
   while (true) {
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
index 9132208cb3..905336b4aa 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -73,7 +73,7 @@ static void initialize_console(void)
 
     lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_PCLK_DEFAULT);
     lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
-    BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD);
+    BSP_CONSOLE_UART_INIT(LPC24XX_PCLK / 16 / LPC24XX_UART_BAUD);
   #endif
 }
 
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
index 5e0034924e..56373ec80f 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -20,11 +20,7 @@
  * http://www.rtems.com/license/LICENSE.
  */
 
-#include <stdbool.h>
-
-#include <rtems/score/armv7m.h>
-
-#include <bspopts.h>
+#include <bsp.h>
 #include <bsp/io.h>
 #include <bsp/start.h>
 #include <bsp/lpc24xx.h>
@@ -102,6 +98,13 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_emc_dynamic(void)
         &lpc24xx_start_config_emc_dynamic [0];
       uint32_t dynamiccontrol = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS;
 
+      #ifdef ARM_MULTILIB_ARCH_V7M
+        volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+
+        /* Delay control */
+        scb->emcdlyctl = cfg->emcdlyctl;
+      #endif
+
       emc->dynamicreadconfig = cfg->readconfig;
 
       /* Timings */
@@ -168,6 +171,15 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_main_oscillator(void)
         /* Wait */
       }
     }
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+
+    if ((scb->scs & LPC17XX_SCB_SCS_OSC_STATUS) == 0) {
+      scb->scs |= LPC17XX_SCB_SCS_OSC_ENABLE;
+      while ((scb->scs & LPC17XX_SCB_SCS_OSC_STATUS) == 0) {
+        /* Wait */
+      }
+    }
   #endif
 }
 
@@ -252,6 +264,71 @@ static BSP_START_TEXT_SECTION void lpc24xx_set_pll(
   lpc24xx_pll_config(PLLCON_PLLE | PLLCON_PLLC);
 }
 
+#else /* ARM_MULTILIB_ARCH_V4 */
+
+static BSP_START_TEXT_SECTION void lpc17xx_pll_config(
+  volatile lpc17xx_pll *pll,
+  uint32_t val
+)
+{
+  pll->con = val;
+  pll->feed = 0xaa;
+  pll->feed = 0x55;
+}
+
+static BSP_START_TEXT_SECTION void lpc17xx_set_pll(
+  unsigned msel,
+  unsigned psel,
+  unsigned cclkdiv
+)
+{
+  volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+  volatile lpc17xx_pll *pll = &scb->pll_0;
+  uint32_t pllcfg = LPC17XX_PLL_SEL_MSEL(msel)
+    | LPC17XX_PLL_SEL_PSEL(psel);
+  uint32_t pllstat = LPC17XX_PLL_STAT_PLLE
+    | LPC17XX_PLL_STAT_PLOCK | pllcfg;
+  uint32_t cclksel_cclkdiv = LPC17XX_SCB_CCLKSEL_CCLKDIV(cclkdiv);
+  uint32_t cclksel = LPC17XX_SCB_CCLKSEL_CCLKSEL | cclksel_cclkdiv;
+
+  if (
+    pll->stat != pllstat
+      || scb->cclksel != cclksel
+      || scb->clksrcsel != LPC17XX_SCB_CLKSRCSEL_CLKSRC
+  ) {
+    /* Use SYSCLK for CCLK */
+    scb->cclksel = LPC17XX_SCB_CCLKSEL_CCLKDIV(1);
+
+    /* Turn off USB */
+    scb->usbclksel = 0;
+
+    /* Disable PLL */
+    lpc17xx_pll_config(pll, 0);
+
+    /* Select main oscillator as clock source */
+    scb->clksrcsel = LPC17XX_SCB_CLKSRCSEL_CLKSRC;
+
+    /* Set PLL configuration */
+    pll->cfg = pllcfg;
+
+    /* Set the CCLK, PCLK and EMCCLK divider */
+    scb->cclksel = cclksel_cclkdiv;
+    scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(LPC24XX_PCLKDIV);
+    scb->emcclksel = LPC24XX_EMCCLKDIV == 1 ? 0 : LPC17XX_SCB_EMCCLKSEL_EMCDIV;
+
+    /* Enable PLL */
+    lpc17xx_pll_config(pll, LPC17XX_PLL_CON_PLLE);
+
+    /* Wait for lock */
+    while ((pll->stat & LPC17XX_PLL_STAT_PLOCK) == 0) {
+      /* Wait */
+    }
+
+    /* Use the PLL clock */
+    scb->cclksel = cclksel;
+  }
+}
+
 #endif /* ARM_MULTILIB_ARCH_V4 */
 
 static BSP_START_TEXT_SECTION void lpc24xx_init_pll(void)
@@ -274,6 +351,22 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_pll(void)
     #else
       #error "unexpected main oscillator frequency"
     #endif
+  #else
+    #if LPC24XX_OSCILLATOR_MAIN == 12000000U
+      #if LPC24XX_CCLK == 120000000U
+        lpc17xx_set_pll(9, 0, 1);
+      #elif LPC24XX_CCLK == 96000000U
+        lpc17xx_set_pll(7, 0, 1);
+      #elif LPC24XX_CCLK == 72000000U
+        lpc17xx_set_pll(5, 1, 1);
+      #elif LPC24XX_CCLK == 48000000U
+        lpc17xx_set_pll(3, 1, 1);
+      #else
+        #error "unexpected CCLK"
+      #endif
+    #else
+      #error "unexpected main oscillator frequency"
+    #endif
   #endif
 }
 
@@ -282,6 +375,10 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_memory_map(void)
   #ifdef ARM_MULTILIB_ARCH_V4
     /* Re-map interrupt vectors to internal RAM */
     MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2);
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+
+    scb->memmap = LPC17XX_SCB_MEMMAP_MAP;
   #endif
 
   /* Use normal memory map */
@@ -306,6 +403,22 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_memory_accelerator(void)
 
     /* Enable fast IO for ports 0 and 1 */
     SCS |= 0x1;
+  #else
+    volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+
+    #if LPC24XX_CCLK <= 20000000U
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x0);
+    #elif LPC24XX_CCLK <= 40000000U
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x1);
+    #elif LPC24XX_CCLK <= 60000000U
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x2);
+    #elif LPC24XX_CCLK <= 80000000U
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x3);
+    #elif LPC24XX_CCLK <= 100000000U
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x4);
+    #else
+      scb->flashcfg = LPC17XX_SCB_FLASHCFG_FLASHTIM(0x5);
+    #endif
   #endif
 }
 
@@ -314,6 +427,9 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_gpdma(void)
   #ifdef LPC24XX_STOP_GPDMA
     #ifdef ARM_MULTILIB_ARCH_V4
       bool has_power = (PCONP & PCONP_GPDMA) != 0;
+    #else
+      volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+      bool has_power = (scb->pconp & LPC17XX_SCB_PCONP_GPDMA) != 0;
     #endif
 
     if (has_power) {
@@ -321,6 +437,8 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_gpdma(void)
 
       #ifdef ARM_MULTILIB_ARCH_V4
         PCONP &= ~PCONP_GPDMA;
+      #else
+        scb->pconp &= ~LPC17XX_SCB_PCONP_GPDMA;
       #endif
     }
   #endif
@@ -331,6 +449,9 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_ethernet(void)
   #ifdef LPC24XX_STOP_ETHERNET
     #ifdef ARM_MULTILIB_ARCH_V4
       bool has_power = (PCONP & PCONP_ETHERNET) != 0;
+    #else
+      volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+      bool has_power = (scb->pconp & LPC17XX_SCB_PCONP_ENET) != 0;
     #endif
 
     if (has_power) {
@@ -340,6 +461,8 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_ethernet(void)
 
       #ifdef ARM_MULTILIB_ARCH_V4
         PCONP &= ~PCONP_ETHERNET;
+      #else
+        scb->pconp &= ~LPC17XX_SCB_PCONP_ENET;
       #endif
     }
   #endif
@@ -350,6 +473,9 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_usb(void)
   #ifdef LPC24XX_STOP_USB
     #ifdef ARM_MULTILIB_ARCH_V4
       bool has_power = (PCONP & PCONP_USB) != 0;
+    #else
+      volatile lpc17xx_scb *scb = &LPC17XX_SCB;
+      bool has_power = (scb->pconp & LPC17XX_SCB_PCONP_USB) != 0;
     #endif
 
     if (has_power) {
@@ -357,11 +483,33 @@ static BSP_START_TEXT_SECTION void lpc24xx_stop_usb(void)
 
       #ifdef ARM_MULTILIB_ARCH_V4
         PCONP &= ~PCONP_USB;
+      #else
+        scb->pconp &= ~LPC17XX_SCB_PCONP_USB;
+        scb->usbclksel = 0;
       #endif
     }
   #endif
 }
 
+static BSP_START_TEXT_SECTION void lpc24xx_init_mpu(void)
+{
+  #ifdef ARM_MULTILIB_ARCH_V7M
+    volatile ARMV7M_MPU *mpu = _ARMV7M_MPU;
+    size_t n = sizeof(lpc24xx_start_config_mpu_regions)
+      / sizeof(lpc24xx_start_config_mpu_regions [0]);
+    size_t i = 0;
+
+    for (i = 0; i < n; ++i) {
+      mpu->rbar = lpc24xx_start_config_mpu_regions [i].rbar;
+      mpu->rasr = lpc24xx_start_config_mpu_regions [i].rasr;
+    }
+
+    if (n > 0) {
+      mpu->ctrl = ARMV7M_MPU_CTRL_ENABLE;
+    }
+  #endif
+}
+
 BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
 {
   lpc24xx_init_main_oscillator();
@@ -375,6 +523,7 @@ BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
   lpc24xx_init_memory_map();
   lpc24xx_init_memory_accelerator();
   lpc24xx_init_emc_dynamic();
+  lpc24xx_init_mpu();
   lpc24xx_stop_gpdma();
   lpc24xx_stop_ethernet();
   lpc24xx_stop_usb();
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram
new file mode 100644
index 0000000000..60faf1267e
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram
@@ -0,0 +1,26 @@
+/* LPC1788 OEM Board from Embedded Artists */
+
+MEMORY {
+	RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
+	RAM_PER (AIW) : ORIGIN = 0x20000000, LENGTH = 32k
+	RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
+	NIRVANA : ORIGIN = 0, LENGTH = 0
+}
+
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.armv7
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int
new file mode 100644
index 0000000000..dd87517114
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int
@@ -0,0 +1,26 @@
+/* LPC1788 OEM Board from Embedded Artists */
+
+MEMORY {
+	ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
+	RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
+	NIRVANA : ORIGIN = 0, LENGTH = 0
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_INT);
+REGION_ALIAS ("REGION_WORK", RAM_INT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.armv7
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c
new file mode 100644
index 0000000000..b428de655d
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c
@@ -0,0 +1,67 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief BSP start MPU configuration.
+ */
+
+/*
+ * Copyright (c) 2011-2012 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp/start-config.h>
+
+#ifdef ARM_MULTILIB_ARCH_V7M
+  BSP_START_DATA_SECTION const ARMV7M_MPU_Region
+    lpc24xx_start_config_mpu_regions [LPC24XX_MPU_REGION_COUNT] = {
+      ARMV7M_MPU_REGION_INITIALIZER(
+        0,
+        0x00000000,
+        ARMV7M_MPU_SIZE_512_KB,
+        ARMV7M_MPU_ATTR_RX
+      ),
+      ARMV7M_MPU_REGION_INITIALIZER(
+        1,
+        0x10000000,
+        ARMV7M_MPU_SIZE_64_KB,
+        ARMV7M_MPU_ATTR_RWX
+      ),
+      ARMV7M_MPU_REGION_INITIALIZER(
+        2,
+        0x20000000,
+        ARMV7M_MPU_SIZE_32_KB,
+        ARMV7M_MPU_ATTR_RWX
+      ),
+      ARMV7M_MPU_REGION_INITIALIZER(
+        3,
+        0xa0000000,
+        ARMV7M_MPU_SIZE_32_MB,
+        ARMV7M_MPU_ATTR_RWX
+      ),
+      ARMV7M_MPU_REGION_INITIALIZER(
+        4,
+        0x20080000,
+        ARMV7M_MPU_SIZE_128_KB,
+        ARMV7M_MPU_ATTR_IO
+      ),
+      ARMV7M_MPU_REGION_INITIALIZER(
+        5,
+        0x40000000,
+        ARMV7M_MPU_SIZE_1_MB,
+        ARMV7M_MPU_ATTR_IO
+      ),
+      ARMV7M_MPU_REGION_DISABLED_INITIALIZER(6),
+      ARMV7M_MPU_REGION_DISABLED_INITIALIZER(7)
+  };
+#endif
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c
index 96e17c56d0..43f12f6730 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -18,8 +18,6 @@
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
  * http://www.rtems.com/license/LICENSE.
- *
- * $Id$
  */
 
 #include <bsp/start-config.h>
@@ -41,6 +39,20 @@ BSP_START_DATA_SECTION const lpc24xx_pin_range
   LPC24XX_PIN_EMC_OE,
   LPC24XX_PIN_EMC_CS_1,
 #endif
+#if defined(LPC24XX_EMC_IS42S32800B)
+  LPC24XX_PIN_EMC_A_0_14,
+  LPC24XX_PIN_EMC_D_0_31,
+  LPC24XX_PIN_EMC_RAS,
+  LPC24XX_PIN_EMC_CAS,
+  LPC24XX_PIN_EMC_WE,
+  LPC24XX_PIN_EMC_DYCS_0,
+  LPC24XX_PIN_EMC_CLK_0,
+  LPC24XX_PIN_EMC_CKE_0,
+  LPC24XX_PIN_EMC_DQM_0,
+  LPC24XX_PIN_EMC_DQM_1,
+  LPC24XX_PIN_EMC_DQM_2,
+  LPC24XX_PIN_EMC_DQM_3,
+#endif
 #if defined(LPC24XX_EMC_W9825G2JB75I) \
   && defined(LPC24XX_EMC_SST39VF3201)
   LPC24XX_PIN_EMC_A_0_22,