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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-11-25 08:40:20 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-11-27 10:33:30 +0100 |
| commit | cbc433c7a25dbe19414f70edc64f9de1f630a117 (patch) | |
| tree | 8d53c70658b82b052f0c5c81e7a025548a147aea /c/src/lib/libbsp/arm/xilinx-zynq | |
| parent | rtems: Add rtems_cache_coherent_allocate() (diff) | |
| download | rtems-cbc433c7a25dbe19414f70edc64f9de1f630a117.tar.bz2 | |
bsps/arm: Add .nocache section
This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
Diffstat (limited to 'c/src/lib/libbsp/arm/xilinx-zynq')
| -rw-r--r-- | c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 4 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c | 5 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in | 5 |
3 files changed, 13 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac index 8f47f2f072..ccc90508c9 100644 --- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac +++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac @@ -77,6 +77,9 @@ RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zedboard],[512M]) RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[*],[256M]) RTEMS_BSPOPTS_HELP([BSP_ZYNQ_RAM_LENGTH],[override a BSP's default RAM length]) +RTEMS_BSPOPTS_SET([BSP_ZYNQ_NOCACHE_LENGTH],[*],[1M]) +RTEMS_BSPOPTS_HELP([BSP_ZYNQ_NOCACHE_LENGTH],[length of nocache RAM region]) + AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu], [ZYNQ_RAM_ORIGIN="0x00000000" ZYNQ_RAM_MMU="0x0fffc000" @@ -133,6 +136,7 @@ ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}]) ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}]) ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQ_RAM_ORIGIN_AVAILABLE}]) ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQ_RAM_LENGTH_AVAILABLE}]) +ZYNQ_LINKCMD([ZYNQ_RAM_NOCACHE_LENGTH],[length of nocache RAM region],[${BSP_ZYNQ_NOCACHE_LENGTH}]) ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQ_RAM_INT_0_ORIGIN}]) ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQ_RAM_INT_0_LENGTH}]) ZYNQ_LINKCMD([ZYNQ_RAM_INT_1_ORIGIN],[internal 1 RAM region origin],[${ZYNQ_RAM_INT_1_ORIGIN}]) diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c index ad66640861..62511e77b0 100644 --- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c @@ -16,6 +16,7 @@ #include <bsp/bootcard.h> #include <bsp/arm-a9mpcore-clock.h> #include <bsp/irq-generic.h> +#include <bsp/linker-symbols.h> __attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void) { @@ -26,4 +27,8 @@ void bsp_start(void) { a9mpcore_clock_initialize_early(); bsp_interrupt_initialize(); + rtems_cache_coherent_add_area( + bsp_nocache_heap_begin, + (uintptr_t) bsp_nocache_heap_size + ); } diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in b/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in index 7239f0de85..7fd6e2772d 100644 --- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in +++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in @@ -2,7 +2,8 @@ MEMORY { RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@ RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@ RAM_MMU : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@ - RAM : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ + RAM : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@ + NOCACHE : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@ } bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @ZYNQ_CPUS@; @@ -22,6 +23,8 @@ REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); REGION_ALIAS ("REGION_BSS", RAM); REGION_ALIAS ("REGION_WORK", RAM); REGION_ALIAS ("REGION_STACK", RAM); +REGION_ALIAS ("REGION_NOCACHE", NOCACHE); +REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; |