bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

9 files changed, 8 insertions, 297 deletions

diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
index 746c605f68..0b8a86358d 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
@@ -10,7 +10,7 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
-dist_project_lib_DATA = startup/bsp_specs
+dist_project_lib_DATA = ../../../../../../bsps/arm/xilinx-zynq/start/bsp_specs
 
 ###############################################################################
 #                  Header                                                     #
@@ -42,16 +42,16 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/cpucounter/cpucounter
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/sbrk.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/btimer/btimer-stub.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/stackalloc.c
-librtemsbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/start/bsp-start-memcpy.S
 librtemsbsp_a_SOURCES += ../shared/arm-cp15-set-exception-handler.c
 librtemsbsp_a_SOURCES += ../shared/arm-cp15-set-ttb-entries.c
 
 # Startup
-librtemsbsp_a_SOURCES += startup/bspreset.c
-librtemsbsp_a_SOURCES += startup/bspstart.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspreset.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstart.c
 if HAS_SMP
 librtemsbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
-librtemsbsp_a_SOURCES += startup/bspsmp.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspsmp.c
 endif
 
 # IRQ
@@ -74,8 +74,8 @@ librtemsbsp_a_SOURCES += i2c/cadence-i2c.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-l2c-310.c
 
 # Start hooks
-librtemsbsp_a_SOURCES += startup/bspstarthooks.c
-librtemsbsp_a_SOURCES += startup/bspstartmmu.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstarthooks.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstartmmu.c
 
 ###############################################################################
 #                  Special Rules                                              #
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
index efd0223a78..ec0a8f1074 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
@@ -144,5 +144,5 @@ RTEMS_BSP_CLEANUP_OPTIONS
 
 AC_CONFIG_FILES([
 Makefile
-linkcmds:startup/linkcmds.in])
+linkcmds:../../../../../../bsps/arm/xilinx-zynq/start/linkcmds.in])
 AC_OUTPUT
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bsp_specs b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bsp_specs
deleted file mode 100644
index 47dd31d46b..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bsp_specs
+++ /dev/null
@@ -1,9 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
-
-*endfile:
-%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspreset.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspreset.c
deleted file mode 100644
index b57354c9e2..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspreset.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2013, 2017 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <bsp/bootcard.h>
-#include <bsp/zynq-uart.h>
-
-void bsp_reset(void)
-{
-  volatile uint32_t *slcr_unlock = (volatile uint32_t *) 0xf8000008;
-  volatile uint32_t *pss_rst_ctrl = (volatile uint32_t *) 0xf8000200;
-
-  zynq_uart_reset_tx_flush(&zynq_uart_instances[BSP_CONSOLE_MINOR]);
-
-  while (true) {
-    *slcr_unlock = 0xdf0d;
-    *pss_rst_ctrl = 0x1;
-  }
-}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c
deleted file mode 100644
index b516823243..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems/score/smpimpl.h>
-
-#include <bsp/start.h>
-
-bool _CPU_SMP_Start_processor(uint32_t cpu_index)
-{
-  /*
-   * Enable the second CPU.
-   */
-  if (cpu_index != 0) {
-    volatile uint32_t* const kick_address = (uint32_t*) 0xfffffff0UL;
-    _ARM_Data_synchronization_barrier();
-    _ARM_Instruction_synchronization_barrier();
-    *kick_address = (uint32_t) _start;
-    _ARM_Data_synchronization_barrier();
-    _ARM_Instruction_synchronization_barrier();
-    _ARM_Send_event();
-  }
-
-  /*
-   * Wait for secondary processor to complete its basic initialization so that
-   * we can enable the unified L2 cache.
-   */
-  return _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
-}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
deleted file mode 100644
index 14a20df7ef..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2013-2015 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <bsp/bootcard.h>
-#include <bsp/arm-a9mpcore-clock.h>
-#include <bsp/irq-generic.h>
-#include <bsp/linker-symbols.h>
-
-__attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void)
-{
-  return ZYNQ_CLOCK_CPU_1X;
-}
-
-void bsp_start(void)
-{
-  a9mpcore_clock_initialize_early();
-  bsp_interrupt_initialize();
-  rtems_cache_coherent_add_area(
-    bsp_section_nocacheheap_begin,
-    (uintptr_t) bsp_section_nocacheheap_size
-  );
-}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c
deleted file mode 100644
index 5372380c24..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
-
-#include <bsp.h>
-#include <bsp/start.h>
-#include <bsp/arm-cp15-start.h>
-#include <bsp/arm-a9mpcore-start.h>
-
-BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
-{
-  uint32_t sctlr_val;
-
-  sctlr_val = arm_cp15_get_control();
-
-  /*
-   * Current U-boot loader seems to start kernel image
-   * with I and D caches on and MMU enabled.
-   * If RTEMS application image finds that cache is on
-   * during startup then disable caches.
-   */
-  if ( sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M ) ) {
-    if ( sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M ) ) {
-      /*
-       * If the data cache is on then ensure that it is clean
-       * before switching off to be extra carefull.
-       */
-      arm_cp15_data_cache_clean_all_levels();
-    }
-    arm_cp15_flush_prefetch_buffer();
-    sctlr_val &= ~ ( ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A );
-    arm_cp15_set_control( sctlr_val );
-  }
-  arm_cp15_instruction_cache_invalidate();
-  /*
-   * The care should be taken there that no shared levels
-   * are invalidated by secondary CPUs in SMP case.
-   * It is not problem on Zynq because level of coherency
-   * is L1 only and higher level is not maintained and seen
-   * by CP15. So no special care to limit levels on the secondary
-   * are required there.
-   */
-  arm_cp15_data_cache_invalidate_all_levels();
-  arm_cp15_branch_predictor_invalidate_all();
-  arm_cp15_tlb_invalidate();
-  arm_cp15_flush_prefetch_buffer();
-  arm_a9mpcore_start_hook_0();
-}
-
-BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
-{
-  arm_a9mpcore_start_hook_1();
-  bsp_start_copy_sections();
-  zynq_setup_mmu_and_cache();
-
-#if !defined(RTEMS_SMP) \
-  && (defined(BSP_DATA_CACHE_ENABLED) \
-    || defined(BSP_INSTRUCTION_CACHE_ENABLED))
-  /* Enable unified L2 cache */
-  rtems_cache_enable_data();
-#endif
-
-  bsp_start_clear_bss();
-}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
deleted file mode 100644
index e0a7743e57..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
-
-#include <bsp.h>
-#include <bsp/start.h>
-#include <bsp/arm-cp15-start.h>
-#include <bsp/arm-a9mpcore-start.h>
-
-BSP_START_DATA_SECTION static const arm_cp15_start_section_config
-zynq_mmu_config_table[] = {
-  ARMV7_CP15_START_DEFAULT_SECTIONS,
-#if defined(RTEMS_SMP)
-  {
-    .begin = 0xffff0000U,
-    .end = 0xffffffffU,
-    .flags = ARMV7_MMU_DEVICE
-  },
-#endif
-  {
-    .begin = 0xe0000000U,
-    .end = 0xe0200000U,
-    .flags = ARMV7_MMU_DEVICE
-  }, {
-    .begin = 0xf8000000U,
-    .end = 0xf9000000U,
-    .flags = ARMV7_MMU_DEVICE
-  }
-};
-
-/*
- * Make weak and let the user override.
- */
-BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void) __attribute__ ((weak));
-
-BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
-{
-  uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
-    ARM_CP15_CTRL_A,
-    ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
-  );
-
-  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
-    ctrl,
-    (uint32_t *) bsp_translation_table_base,
-    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
-    &zynq_mmu_config_table[0],
-    RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
-  );
-}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in b/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in
deleted file mode 100644
index 7fd6e2772d..0000000000
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in
+++ /dev/null
@@ -1,39 +0,0 @@
-MEMORY {
-   RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@
-   RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@
-   RAM_MMU   : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@
-   RAM       : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@
-   NOCACHE   : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@
-}
-
-bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @ZYNQ_CPUS@;
-
-REGION_ALIAS ("REGION_START",          RAM);
-REGION_ALIAS ("REGION_VECTOR",         RAM);
-REGION_ALIAS ("REGION_TEXT",           RAM);
-REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
-REGION_ALIAS ("REGION_RODATA",         RAM);
-REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
-REGION_ALIAS ("REGION_DATA",           RAM);
-REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
-REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
-REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
-REGION_ALIAS ("REGION_FAST_DATA",      RAM);
-REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
-REGION_ALIAS ("REGION_BSS",            RAM);
-REGION_ALIAS ("REGION_WORK",           RAM);
-REGION_ALIAS ("REGION_STACK",          RAM);
-REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
-REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);
-
-bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
-bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
-
-bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
-
-bsp_vector_table_in_start_section = 1;
-
-bsp_translation_table_base = ORIGIN (RAM_MMU);
-bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
-
-INCLUDE linkcmds.armv4