diff options
| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-03 17:26:50 +0200 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-04 15:55:57 +0200 |
| commit | d431653739274ca699bf462fb4635de6a6b128af (patch) | |
| tree | 1bad3f9b9de775989643373a37a9e75a3feba7ee /c/src/lib/libbsp/arm/smdk2410 | |
| parent | bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310. (diff) | |
| download | rtems-d431653739274ca699bf462fb4635de6a6b128af.tar.bz2 | |
bsps/arm: Change code to explicit selection of cache implementation for ARM BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.
The ARM targets equipped by cache should include
appropriate implementation.
Next options are available for now
c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
basic ARM cache integrated on the CPU core directly
which requires only CP15 oparations
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
support for case where ARM L2C-310 cache controller
is used. It is accessible as mmaped peripheral.
c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
Cortex-M specific cache support
Diffstat (limited to 'c/src/lib/libbsp/arm/smdk2410')
| -rw-r--r-- | c/src/lib/libbsp/arm/smdk2410/Makefile.am | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/smdk2410/Makefile.am b/c/src/lib/libbsp/arm/smdk2410/Makefile.am index f2bf22dc96..7ded7214f4 100644 --- a/c/src/lib/libbsp/arm/smdk2410/Makefile.am +++ b/c/src/lib/libbsp/arm/smdk2410/Makefile.am @@ -11,6 +11,7 @@ include_HEADERS += smc/smc.h include_HEADERS += ../../shared/include/tm27.h include_bsp_HEADERS = +libbsp_a_CPPFLAGS = nodist_include_HEADERS = include/bspopts.h nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h @@ -64,8 +65,9 @@ libbsp_a_SOURCES += smc/smc.h # Cache libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c -libbsp_a_SOURCES += ../../shared/include/cache_.h -libbsp_a_CPPFLAGS = -I$(srcdir)/../../shared/include +libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h +libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h +libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel \ ../../../libcpu/@RTEMS_CPU@/s3c24xx/clock.rel \ |