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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-08-04 17:46:07 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-08-04 17:46:07 +0000 |
| commit | 6579ae04803a7c00bf0bc4986d85326bd8e08427 (patch) | |
| tree | 8ad58eb93034d0acb257b8f3c17c35c651e40507 /c/src/lib/libbsp/arm/shared | |
| parent | 2008-08-04 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
| download | rtems-6579ae04803a7c00bf0bc4986d85326bd8e08427.tar.bz2 | |
2008-08-04 Ray Xu <rayx.cn@gmail.com>
* shared/irq/irq_asm.S: Correct minor mistakes in adding Thumb code
which prevented ARM from working.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared')
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/irq/irq_asm.S | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S index 944c05dbbb..202d3330f2 100644 --- a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S @@ -47,7 +47,7 @@ _ISR_Handler: /* BSP specific function to INT handler */ /* FIXME: I'm not sure why I can't save just r12. I'm also */ /* not sure which of r1-r3 are important. */ -#if __thumb__ +#ifdef __thumb__ ldr r0, =ExecuteITHandler +1 mov lr, pc bx r0 @@ -121,7 +121,7 @@ bframe: /* we have to emulate that */ #ifdef __thumb__ sub lr, #0x1 -#endif +#endif ldmia sp!, {r1} /* out with the old */ stmdb sp!, {lr} /* in with the new (lr) */ #ifndef __thumb__ @@ -147,6 +147,7 @@ _ISR_Dispatch: /* we don't save lr, since */ /* it's just going to get */ /* overwritten */ + nop /* made _ISR_Dispatch_p_4 4-word align */ #else .code 32 stmdb sp!, {r0-r3, r12,lr} /* save regs on SVC stack */ @@ -155,7 +156,7 @@ _ISR_Dispatch: /* it's just going to get */ /* overwritten */ #endif - nop /*made _ISR_Dispatch_p_4 4-word align */ + _ISR_Dispatch_p_4: bl _Thread_Dispatch |