diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-09-25 14:34:24 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-09-28 13:56:57 +0200 |
| commit | 258ad71e9626c16f30b40e06c321326636c976ff (patch) | |
| tree | da6e210947d590159796434bf04cf364247ac20a /c/src/lib/libbsp/arm/shared | |
| parent | SMP: Simplify thread lock operations (diff) | |
| download | rtems-258ad71e9626c16f30b40e06c321326636c976ff.tar.bz2 | |
SMP: Fix and optimize thread dispatching
According to the C11 and C++11 memory models only a read-modify-write
operation guarantees that we read the last value written in modification
order. Avoid the sequential consistent thread fence and instead use the
inter-processor interrupt to set the thread dispatch necessary
indicator.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared')
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c index f2c0201c2c..7e939ff162 100644 --- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c +++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * Copyright (c) 2013-2015 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 @@ -62,6 +62,7 @@ void _CPU_SMP_Prepare_start_multitasking( void ) void _CPU_SMP_Send_interrupt( uint32_t target_processor_index ) { + _ARM_Data_memory_barrier(); arm_gic_irq_generate_software_irq( ARM_GIC_IRQ_SGI_0, ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST, |