bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file.  Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

* bsps/shared/cache

* bsps/@RTEMS_CPU@/shared/cache

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

1 files changed, 0 insertions, 144 deletions

diff --git a/c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h b/c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
deleted file mode 100644
index ef94c11734..0000000000
--- a/c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_ARMV7M_CACHE__H
-#define LIBBSP_ARM_ARMV7M_CACHE__H
-
-#include <rtems.h>
-#include <chip.h>
-
-#define CPU_DATA_CACHE_ALIGNMENT 32
-
-#define CPU_INSTRUCTION_CACHE_ALIGNMENT 32
-
-#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
-
-static inline void _CPU_cache_flush_data_range(
-  const void *d_addr,
-  size_t n_bytes
-)
-{
-  SCB_CleanInvalidateDCache_by_Addr(
-    RTEMS_DECONST(uint32_t *, (const uint32_t *) d_addr),
-    n_bytes
-  );
-}
-
-static inline void _CPU_cache_invalidate_data_range(
-  const void *d_addr,
-  size_t n_bytes
-)
-{
-  SCB_InvalidateDCache_by_Addr(
-    RTEMS_DECONST(uint32_t *, (const uint32_t *) d_addr),
-    n_bytes
-  );
-}
-
-static inline void _CPU_cache_freeze_data(void)
-{
-  /* TODO */
-}
-
-static inline void _CPU_cache_unfreeze_data(void)
-{
-  /* TODO */
-}
-
-static inline void _CPU_cache_invalidate_instruction_range(
-  const void *i_addr,
-  size_t n_bytes
-)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_InvalidateICache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_freeze_instruction(void)
-{
-  /* TODO */
-}
-
-static inline void _CPU_cache_unfreeze_instruction(void)
-{
-  /* TODO */
-}
-
-static inline void _CPU_cache_flush_entire_data(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_CleanDCache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_invalidate_entire_data(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_InvalidateDCache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_enable_data(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_EnableDCache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_disable_data(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_DisableDCache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_invalidate_entire_instruction(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_InvalidateICache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_enable_instruction(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_EnableICache();
-  rtems_interrupt_enable(level);
-}
-
-static inline void _CPU_cache_disable_instruction(void)
-{
-  rtems_interrupt_level level;
-
-  rtems_interrupt_disable(level);
-  SCB_DisableICache();
-  rtems_interrupt_enable(level);
-}
-
-#endif /* LIBBSP_ARM_ARMV7M_CACHE__H */