Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
author: Chris Johns <chrisj@rtems.org> 2017-12-23 18:18:56 +1100
committer: Sebastian Huber <sebastian.huber@embedded-brains.de> 2018-01-25 08:45:26 +0100
commit: 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree: 44759efe9374f13200a97e96d91bd9a2b7e5ce2a /c/src/lib/libbsp/arm/lpc32xx
parent: MAINTAINERS: Add myself to Write After Approval. (diff)
download: rtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
16 files changed, 12 insertions, 2630 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/Makefile.am b/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
index df6353da88..d92bccceac 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
+++ b/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
@@ -11,47 +11,12 @@ EXTRA_DIST =
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
-include_bspdir = $(includedir)/bsp
-
-dist_project_lib_DATA = bsp_specs
+dist_project_lib_DATA = startup/bsp_specs
 
 ###############################################################################
 #                  Header                                                     #
 ###############################################################################
 
-include_HEADERS = include/bsp.h
-include_HEADERS += include/tm27.h
-
-nodist_include_HEADERS = include/bspopts.h
-
-nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
-
-include_bsp_HEADERS =
-include_bsp_HEADERS += ../../shared/include/utility.h
-include_bsp_HEADERS += ../../shared/include/irq-generic.h
-include_bsp_HEADERS += ../../shared/include/irq-info.h
-include_bsp_HEADERS += ../../shared/include/stackalloc.h
-include_bsp_HEADERS += ../../shared/include/uart-output-char.h
-include_bsp_HEADERS += ../shared/include/start.h
-include_bsp_HEADERS += ../shared/include/arm-cp15-start.h
-include_bsp_HEADERS += ../shared/include/arm-errata.h
-include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
-include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
-include_bsp_HEADERS += ../shared/lpc/include/lpc-i2s.h
-include_bsp_HEADERS += ../shared/lpc/include/lpc-emc.h
-include_bsp_HEADERS += ../shared/lpc/include/lpc-lcd.h
-include_bsp_HEADERS += ../shared/include/arm-release-id.h
-include_bsp_HEADERS += include/irq.h
-include_bsp_HEADERS += include/mmu.h
-include_bsp_HEADERS += include/lpc32xx.h
-include_bsp_HEADERS += include/lpc-clock-config.h
-include_bsp_HEADERS += include/lpc-ethernet-config.h
-include_bsp_HEADERS += include/nand-mlc.h
-include_bsp_HEADERS += include/boot.h
-include_bsp_HEADERS += include/hsu.h
-include_bsp_HEADERS += include/i2c.h
-include_bsp_HEADERS += include/emc.h
-
 ###############################################################################
 #                  Data                                                       #
 ###############################################################################
@@ -61,13 +26,12 @@ start.$(OBJEXT): ../shared/start/start.S
 	$(CPPASCOMPILE) -o $@ -c $<
 project_lib_DATA = start.$(OBJEXT)
 
-project_lib_DATA += startup/linkcmds
-project_lib_DATA += startup/linkcmds.lpc32xx
-
-EXTRA_DIST += startup/linkcmds.lpc32xx_phycore \
-	startup/linkcmds.lpc32xx_mzx_stage_1 \
-	startup/linkcmds.lpc32xx_mzx_stage_2 \
-	startup/linkcmds.lpc32xx_mzx
+project_lib_DATA += linkcmds
+dist_project_lib_DATA += startup/linkcmds.lpc32xx
+dist_project_lib_DATA += startup/linkcmds.lpc32xx_phycore
+dist_project_lib_DATA += startup/linkcmds.lpc32xx_mzx_stage_1
+dist_project_lib_DATA += startup/linkcmds.lpc32xx_mzx_stage_2
+dist_project_lib_DATA += startup/linkcmds.lpc32xx_mzx
 
 ###############################################################################
 #                  LibBSP                                                     #
@@ -76,7 +40,7 @@ EXTRA_DIST += startup/linkcmds.lpc32xx_phycore \
 noinst_LIBRARIES = libbsp.a
 
 libbsp_a_SOURCES =
-libbsp_a_CPPFLAGS =
+libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
 libbsp_a_LIBADD =
 
 # Shared
@@ -170,5 +134,5 @@ endif
 
 DISTCLEANFILES = include/bspopts.h
 
-include $(srcdir)/preinstall.am
 include $(top_srcdir)/../../../../automake/local.am
+include $(srcdir)/../../../../../../bsps/arm/lpc32xx/headers.am
diff --git a/c/src/lib/libbsp/arm/lpc32xx/configure.ac b/c/src/lib/libbsp/arm/lpc32xx/configure.ac
index 553d1ce314..1383d97c89 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/configure.ac
+++ b/c/src/lib/libbsp/arm/lpc32xx/configure.ac
@@ -9,6 +9,9 @@ AC_PREREQ([2.69])
 AC_INIT([rtems-c-src-lib-libbsp-arm-lpc32xx],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
 AC_CONFIG_SRCDIR([make/custom/lpc32xx_mzx.cfg])
 RTEMS_TOP(../../../../../..)
+RTEMS_SOURCE_TOP
+RTEMS_BUILD_TOP
+RTEMS_BSP_LINKCMDS
 
 RTEMS_CANONICAL_TARGET_CPU
 AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
@@ -106,7 +109,6 @@ RTEMS_BSPOPTS_SET([TESTS_USE_PRINTK],[*],[1])
 RTEMS_BSPOPTS_HELP([TESTS_USE_PRINTK],[tests use printk() for output])
 
 RTEMS_BSP_CLEANUP_OPTIONS
-RTEMS_BSP_LINKCMDS
 
 AC_CONFIG_FILES([Makefile])
 AC_OUTPUT
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/boot.h b/c/src/lib/libbsp/arm/lpc32xx/include/boot.h
deleted file mode 100644
index b9c845bc8f..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/boot.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_boot
- *
- * @brief Boot support API.
- */
-
-/*
- * Copyright (c) 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_BOOT_H
-#define LIBBSP_ARM_LPC32XX_BOOT_H
-
-#include <stdint.h>
-
-#include <bsp/nand-mlc.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_boot Boot Support
- *
- * @ingroup arm_lpc32xx
- *
- * @brief Boot support.
- *
- * The NXP internal boot program shall be the "stage-0 program".
- *
- * The boot program within the first page of the first or second block shall be
- * "stage-1 program".  It will be invoked by the stage-0 program from NXP.
- *
- * The program loaded by the stage-1 program will be the "stage-2 program" or the
- * "boot loader".
- *
- * The program loaded by the stage-2 program will be the "stage-3 program" or the
- * "application".
- *
- * The stage-1 program image must have a format specified by NXP.
- *
- * The stage-2 and stage-3 program images may have any format.
- *
- * @{
- */
-
-#define LPC32XX_BOOT_BLOCK_0 0
-#define LPC32XX_BOOT_BLOCK_1 1
-
-#define LPC32XX_BOOT_ICR_SP_3AC_8IF 0xf0
-#define LPC32XX_BOOT_ICR_SP_4AC_8IF 0xd2
-#define LPC32XX_BOOT_ICR_LP_4AC_8IF 0xb4
-#define LPC32XX_BOOT_ICR_LP_5AC_8IF 0x96
-
-typedef union {
-  struct {
-    uint8_t d0;
-    uint8_t reserved_0 [3];
-    uint8_t d1;
-    uint8_t reserved_1 [3];
-    uint8_t d2;
-    uint8_t reserved_2 [3];
-    uint8_t d3;
-    uint8_t reserved_3 [3];
-    uint8_t d4;
-    uint8_t reserved_4 [3];
-    uint8_t d5;
-    uint8_t reserved_5 [3];
-    uint8_t d6;
-    uint8_t reserved_6 [3];
-    uint8_t d7;
-    uint8_t reserved_7 [3];
-    uint8_t d8;
-    uint8_t reserved_8 [3];
-    uint8_t d9;
-    uint8_t reserved_9 [3];
-    uint8_t d10;
-    uint8_t reserved_10 [3];
-    uint8_t d11;
-    uint8_t reserved_11 [3];
-    uint8_t d12;
-    uint8_t reserved_12 [463];
-  } field;
-  uint32_t data [MLC_SMALL_DATA_WORD_COUNT];
-} lpc32xx_boot_block;
-
-void lpc32xx_setup_boot_block(
-  lpc32xx_boot_block *boot_block,
-  uint8_t icr,
-  uint8_t page_count
-);
-
-void lpc32xx_set_boot_block_bad(
-  lpc32xx_boot_block *boot_block
-);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_BOOT_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
deleted file mode 100644
index 0f9d1318cd..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
+++ /dev/null
@@ -1,259 +0,0 @@
-/**
- * @file
- *
- * @ingroup arm_lpc32xx
- *
- * @brief Global BSP definitions.
- */
-
-/*
- * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Obere Lagerstr. 30
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_BSP_H
-#define LIBBSP_ARM_LPC32XX_BSP_H
-
-#include <bspopts.h>
-
-#define BSP_FEATURE_IRQ_EXTENSION
-
-#ifndef ASM
-
-#include <rtems.h>
-
-#include <bsp/lpc32xx.h>
-#include <bsp/default-initial-extension.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-struct rtems_bsdnet_ifconfig;
-
-/**
- * @defgroup arm_lpc32xx LPC32XX Support
- *
- * @ingroup bsp_arm
- *
- * @brief LPC32XX support package.
- *
- * @{
- */
-
-/**
- * @brief Network driver attach and detach function.
- */
-int lpc_eth_attach_detach(
-  struct rtems_bsdnet_ifconfig *config,
-  int attaching
-);
-
-/**
- * @brief Standard network driver attach and detach function.
- */
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach
-
-/**
- * @brief Standard network driver name.
- */
-#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
-
-/**
- * @brief Optimized idle task.
- *
- * This idle task sets the power mode to idle.  This causes the processor clock
- * to be stopped, while on-chip peripherals remain active.  Any enabled
- * interrupt from a peripheral or an external interrupt source will cause the
- * processor to resume execution.
- *
- * To enable the idle task use the following in the system configuration:
- *
- * @code
- * #include <bsp.h>
- *
- * #define CONFIGURE_INIT
- *
- * #define CONFIGURE_IDLE_TASK_BODY lpc32xx_idle
- *
- * #include <confdefs.h>
- * @endcode
- */
-void *lpc32xx_idle(uintptr_t ignored);
-
-#define LPC32XX_STANDARD_TIMER (&lpc32xx.timer_1)
-
-static inline unsigned lpc32xx_timer(void)
-{
-  volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
-
-  return timer->tc;
-}
-
-static inline void lpc32xx_micro_seconds_delay(unsigned us)
-{
-  unsigned start = lpc32xx_timer();
-  unsigned delay = us * (LPC32XX_PERIPH_CLK / 1000000);
-  unsigned elapsed = 0;
-
-  do {
-    elapsed = lpc32xx_timer() - start;
-  } while (elapsed < delay);
-}
-
-#if LPC32XX_OSCILLATOR_MAIN == 13000000U
-  #define LPC32XX_HCLKPLL_CTRL_INIT_VALUE \
-    (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1))
-  #define LPC32XX_HCLKDIV_CTRL_INIT_VALUE \
-    (HCLK_DIV_HCLK(2 - 1) | HCLK_DIV_PERIPH_CLK(16 - 1) | HCLK_DIV_DDRAM_CLK(0))
-#else
-  #error "unexpected main oscillator frequency"
-#endif
-
-bool lpc32xx_start_pll_setup(
-  uint32_t hclkpll_ctrl,
-  uint32_t hclkdiv_ctrl,
-  bool force
-);
-
-uint32_t lpc32xx_sysclk(void);
-
-uint32_t lpc32xx_hclkpll_clk(void);
-
-uint32_t lpc32xx_periph_clk(void);
-
-uint32_t lpc32xx_hclk(void);
-
-uint32_t lpc32xx_arm_clk(void);
-
-uint32_t lpc32xx_ddram_clk(void);
-
-typedef enum {
-  LPC32XX_NAND_CONTROLLER_NONE,
-  LPC32XX_NAND_CONTROLLER_MLC,
-  LPC32XX_NAND_CONTROLLER_SLC
-} lpc32xx_nand_controller;
-
-void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller);
-
-void bsp_restart(void *addr);
-
-void *bsp_idle_thread(uintptr_t arg);
-
-#define BSP_IDLE_TASK_BODY bsp_idle_thread
-
-#define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5
-
-/**
- * @brief Begin of magic zero area.
- *
- * A read from this area returns zero.  Writes have no effect.
- */
-extern uint32_t lpc32xx_magic_zero_begin [];
-
-/**
- * @brief End of magic zero area.
- *
- * A read from this area returns zero.  Writes have no effect.
- */
-extern uint32_t lpc32xx_magic_zero_end [];
-
-/**
- * @brief Size of magic zero area.
- *
- * A read from this area returns zero.  Writes have no effect.
- */
-extern uint32_t lpc32xx_magic_zero_size [];
-
-#ifdef LPC32XX_SCRATCH_AREA_SIZE
-  /**
-   * @rief Scratch area.
-   *
-   * The usage is application specific.
-   */
-  extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE]
-    __attribute__((aligned(32)));
-#endif
-
-#define LPC32XX_DO_STOP_GPDMA \
-  do { \
-    if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \
-      if ((lpc32xx.dma.cfg & DMA_CFG_E) != 0) { \
-        int i = 0; \
-        for (i = 0; i < 8; ++i) { \
-          lpc32xx.dma.channels [i].cfg = 0; \
-        } \
-        lpc32xx.dma.cfg &= ~DMA_CFG_E; \
-      } \
-      LPC32XX_DMACLK_CTRL = 0; \
-    } \
-  } while (0)
-
-#define LPC32XX_DO_STOP_ETHERNET \
-  do { \
-    if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \
-      lpc32xx.eth.command = 0x38; \
-      lpc32xx.eth.mac1 = 0xcf00; \
-      lpc32xx.eth.mac1 = 0; \
-      LPC32XX_MAC_CLK_CTRL = 0; \
-    } \
-  } while (0)
-
-#define LPC32XX_DO_STOP_USB \
-  do { \
-    if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \
-      LPC32XX_OTG_CLK_CTRL = 0; \
-      LPC32XX_USB_CTRL = 0x80000; \
-    } \
-  } while (0)
-
-#define LPC32XX_DO_RESTART(addr) \
-  do { \
-    ARM_SWITCH_REGISTERS; \
-    rtems_interrupt_level level; \
-    uint32_t ctrl = 0; \
-  \
-    rtems_interrupt_disable(level); \
-  \
-    arm_cp15_data_cache_test_and_clean(); \
-    arm_cp15_instruction_cache_invalidate(); \
-  \
-    ctrl = arm_cp15_get_control(); \
-    ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \
-    arm_cp15_set_control(ctrl); \
-  \
-    __asm__ volatile ( \
-      ARM_SWITCH_TO_ARM \
-      "mov pc, %[addr]\n" \
-      ARM_SWITCH_BACK \
-      : ARM_SWITCH_OUTPUT \
-      : [addr] "r" (addr) \
-    ); \
-  } while (0)
-
-/** @} */
-
-/**
- * @defgroup lpc LPC Support
- *
- * @ingroup arm_lpc32xx
- *
- * @brief LPC support package.
- */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* ASM */
-
-#endif /* LIBBSP_ARM_LPC32XX_BSP_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/emc.h b/c/src/lib/libbsp/arm/lpc32xx/include/emc.h
deleted file mode 100644
index c0ae18b395..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/emc.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_emc
- *
- * @brief EMC support API.
- */
-
-/*
- * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Obere Lagerstr. 30
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_EMC_H
-#define LIBBSP_ARM_LPC32XX_EMC_H
-
-#include <rtems.h>
-
-#include <bsp/lpc-emc.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @addtogroup lpc_emc
- *
- * @brief EMC Support
- *
- * @{
- */
-
-/**
- * @name SDRAM Clock Control Register (SDRAMCLK_CTRL)
- *
- * @{
- */
-
-#define SDRAMCLK_CLOCKS_DIS BSP_BIT32(0)
-#define SDRAMCLK_DDR_MODE BSP_BIT32(1)
-#define SDRAMCLK_DDR_DQSIN_DELAY(val) BSP_FLD32(val, 2, 6)
-#define SDRAMCLK_RTC_TICK_EN BSP_BIT32(7)
-#define SDRAMCLK_SW_DDR_CAL BSP_BIT32(8)
-#define SDRAMCLK_CAL_DELAY BSP_BIT32(9)
-#define SDRAMCLK_SENSITIVITY_FACTOR(val) BSP_FLD32(val, 10, 12)
-#define SDRAMCLK_DCA_STATUS BSP_BIT32(13)
-#define SDRAMCLK_COMMAND_DELAY(val) BSP_FLD32(val, 14, 18)
-#define SDRAMCLK_SW_DDR_RESET BSP_BIT32(19)
-#define SDRAMCLK_PIN_1_FAST BSP_BIT32(20)
-#define SDRAMCLK_PIN_2_FAST BSP_BIT32(21)
-#define SDRAMCLK_PIN_3_FAST BSP_BIT32(22)
-
-/** @} */
-
-/**
- * @name EMC AHB Control Register (EMCAHBControl)
- *
- * @{
- */
-
-#define EMC_AHB_PORT_BUFF_EN BSP_BIT32(0)
-
-/** @} */
-
-/**
- * @name EMC AHB Timeout Register (EMCAHBTimeOut)
- *
- * @{
- */
-
-#define EMC_AHB_TIMEOUT(val) BSP_FLD32(val, 0, 9)
-
-/** @} */
-
-/**
- * @name SDRAM Mode and Extended Mode Registers
- *
- * @{
- */
-
-#define SDRAM_ADDR_ROW_16MB(val) ((uint32_t) (val) << 10)
-#define SDRAM_ADDR_ROW_32MB(val) ((uint32_t) (val) << 11)
-#define SDRAM_ADDR_ROW_64MB(val) ((uint32_t) (val) << 11)
-
-#define SDRAM_ADDR_BANK_16MB(ba1, ba0) \
-  (((uint32_t) (ba1) << 23) | ((uint32_t) (ba0) << 22))
-#define SDRAM_ADDR_BANK_32MB(ba1, ba0) \
-  (((uint32_t) (ba1) << 23) | ((uint32_t) (ba0) << 24))
-#define SDRAM_ADDR_BANK_64MB(ba1, ba0) \
-  (((uint32_t) (ba1) << 25) | ((uint32_t) (ba0) << 24))
-
-#define SDRAM_MODE_16MB(mode) \
-  (SDRAM_ADDR_BANK_16MB(0, 0) | SDRAM_ADDR_ROW_16MB(mode))
-#define SDRAM_MODE_32MB(mode) \
-  (SDRAM_ADDR_BANK_32MB(0, 0) | SDRAM_ADDR_ROW_32MB(mode))
-#define SDRAM_MODE_64MB(mode) \
-  (SDRAM_ADDR_BANK_64MB(0, 0) | SDRAM_ADDR_ROW_64MB(mode))
-
-#define SDRAM_EXTMODE_16MB(mode) \
-  (SDRAM_ADDR_BANK_16MB(1, 0) | SDRAM_ADDR_ROW_16MB(mode))
-#define SDRAM_EXTMODE_32MB(mode) \
-  (SDRAM_ADDR_BANK_32MB(1, 0) | SDRAM_ADDR_ROW_32MB(mode))
-#define SDRAM_EXTMODE_64MB(mode) \
-  (SDRAM_ADDR_BANK_64MB(1, 0) | SDRAM_ADDR_ROW_64MB(mode))
-
-#define SDRAM_MODE_BURST_LENGTH(val) BSP_FLD32(val, 0, 2)
-#define SDRAM_MODE_BURST_INTERLEAVE BSP_BIT32(3)
-#define SDRAM_MODE_CAS(val) BSP_FLD32(val, 4, 6)
-#define SDRAM_MODE_TEST_MODE(val) BSP_FLD32(val, 7, 8)
-#define SDRAM_MODE_WRITE_BURST_SINGLE_BIT BSP_BIT32(9)
-
-#define SDRAM_EXTMODE_PASR(val) BSP_FLD32(val, 0, 2)
-#define SDRAM_EXTMODE_DRIVER_STRENGTH(val) BSP_FLD32(val, 5, 6)
-
-/** @} */
-
-typedef struct {
-  uint32_t size;
-  uint32_t config;
-  uint32_t rascas;
-  uint32_t mode;
-  uint32_t extmode;
-} lpc32xx_emc_dynamic_chip_config;
-
-typedef struct {
-  uint32_t sdramclk_ctrl;
-  uint32_t nop_time_in_us;
-  uint32_t control;
-  uint32_t refresh;
-  uint32_t readconfig;
-  uint32_t trp;
-  uint32_t tras;
-  uint32_t tsrex;
-  uint32_t twr;
-  uint32_t trc;
-  uint32_t trfc;
-  uint32_t txsr;
-  uint32_t trrd;
-  uint32_t tmrd;
-  uint32_t tcdlr;
-  lpc32xx_emc_dynamic_chip_config chip [EMC_DYN_CHIP_COUNT];
-} lpc32xx_emc_dynamic_config;
-
-void lpc32xx_emc_init(const lpc32xx_emc_dynamic_config *dyn_cfg);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_EMC_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/hsu.h b/c/src/lib/libbsp/arm/lpc32xx/include/hsu.h
deleted file mode 100644
index ba97dfb423..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/hsu.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_hsu
- *
- * @brief HSU support API.
- */
-
-/*
- * Copyright (c) 2010-2014 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_HSU_H
-#define LIBBSP_ARM_LPC32XX_HSU_H
-
-#include <rtems/termiostypes.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_hsu HSU Support
- *
- * @ingroup arm_lpc32xx
- *
- * @brief HSU Support
- *
- * @{
- */
-
-typedef struct {
-  uint32_t fifo;
-  uint32_t level;
-  uint32_t iir;
-  uint32_t ctrl;
-  uint32_t rate;
-} lpc32xx_hsu;
-
-typedef struct {
-  rtems_termios_device_context base;
-  volatile lpc32xx_hsu *hsu;
-  size_t chars_in_transmission;
-  rtems_vector_number irq;
-  uint32_t initial_baud;
-} lpc32xx_hsu_context;
-
-extern const rtems_termios_device_handler lpc32xx_hsu_fns;
-
-bool lpc32xx_hsu_probe(rtems_termios_device_context *base);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_HSU_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h b/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h
deleted file mode 100644
index e0bf8349ac..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h
+++ /dev/null
@@ -1,269 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_i2c
- *
- * @brief I2C support API.
- */
-
-/*
- * Copyright (c) 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_I2C_H
-#define LIBBSP_ARM_LPC32XX_I2C_H
-
-#include <rtems.h>
-
-#include <bsp/lpc32xx.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_i2c I2C Support
- *
- * @ingroup arm_lpc32xx
- *
- * @brief I2C Support
- *
- * All writes and reads will be performed in master mode.  Exclusive bus access
- * will be assumed.
- *
- * @{
- */
-
-/**
- * @name I2C Clock Control Register (I2CCLK_CTRL)
- *
- * @{
- */
-
-#define I2CCLK_1_EN BSP_BIT32(0)
-#define I2CCLK_2_EN BSP_BIT32(1)
-#define I2CCLK_1_HIGH_DRIVE BSP_BIT32(2)
-#define I2CCLK_2_HIGH_DRIVE BSP_BIT32(3)
-#define I2CCLK_USB_HIGH_DRIVE BSP_BIT32(4)
-
-/** @} */
-
-/**
- * @name I2C TX Data FIFO Register (I2Cn_TX)
- *
- * @{
- */
-
-#define I2C_TX_READ BSP_BIT32(0)
-#define I2C_TX_ADDR(val) BSP_FLD32(val, 1, 7)
-#define I2C_TX_START BSP_BIT32(8)
-#define I2C_TX_STOP BSP_BIT32(9)
-
-/** @} */
-
-/**
- * @name I2C Status Register (I2Cn_STAT)
- *
- * @{
- */
-
-#define I2C_STAT_TDI BSP_BIT32(0)
-#define I2C_STAT_AFI BSP_BIT32(1)
-#define I2C_STAT_NAI BSP_BIT32(2)
-#define I2C_STAT_DRMI BSP_BIT32(3)
-#define I2C_STAT_DRSI BSP_BIT32(4)
-#define I2C_STAT_ACTIVE BSP_BIT32(5)
-#define I2C_STAT_SCL BSP_BIT32(6)
-#define I2C_STAT_SDA BSP_BIT32(7)
-#define I2C_STAT_RFF BSP_BIT32(8)
-#define I2C_STAT_RFE BSP_BIT32(9)
-#define I2C_STAT_TFF BSP_BIT32(10)
-#define I2C_STAT_TFE BSP_BIT32(11)
-#define I2C_STAT_TFFS BSP_BIT32(12)
-#define I2C_STAT_TFES BSP_BIT32(13)
-
-/** @} */
-
-/**
- * @name I2C Control Register (I2Cn_CTRL)
- *
- * @{
- */
-
-#define I2C_CTRL_TDIE BSP_BIT32(0)
-#define I2C_CTRL_AFIE BSP_BIT32(1)
-#define I2C_CTRL_NAIE BSP_BIT32(2)
-#define I2C_CTRL_DRMIE BSP_BIT32(3)
-#define I2C_CTRL_DRSIE BSP_BIT32(4)
-#define I2C_CTRL_RFFIE BSP_BIT32(5)
-#define I2C_CTRL_RFDAIE BSP_BIT32(6)
-#define I2C_CTRL_TFFIO BSP_BIT32(7)
-#define I2C_CTRL_RESET BSP_BIT32(8)
-#define I2C_CTRL_SEVEN BSP_BIT32(9)
-#define I2C_CTRL_TFFSIE BSP_BIT32(10)
-
-/** @} */
-
-/**
- * @brief Initializes the I2C module @a i2c.
- *
- * Valid @a clock_in_hz values are 100000 and 400000.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid @a i2c value.
- * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value.
- */
-rtems_status_code lpc32xx_i2c_init(
-  volatile lpc32xx_i2c *i2c,
-  unsigned clock_in_hz
-);
-
-/**
- * @brief Resets the I2C module @a i2c.
- */
-void lpc32xx_i2c_reset(volatile lpc32xx_i2c *i2c);
-
-/**
- * @brief Sets the I2C module @a i2c clock.
- *
- * Valid @a clock_in_hz values are 100000 and 400000.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value.
- */
-rtems_status_code lpc32xx_i2c_clock(
-  volatile lpc32xx_i2c *i2c,
-  unsigned clock_in_hz
-);
-
-/**
- * @brief Starts a write transaction on the I2C module @a i2c.
- *
- * The address parameter @a addr must not contain the read/write bit.
- *
- * The error status may be delayed to the next
- * lpc32xx_i2c_write_with_optional_stop() due to controller flaws.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-rtems_status_code lpc32xx_i2c_write_start(
-  volatile lpc32xx_i2c *i2c,
-  unsigned addr
-);
-
-/**
- * @brief Writes data via the I2C module @a i2c with optional stop.
- *
- * The error status may be delayed to the next
- * lpc32xx_i2c_write_with_optional_stop() due to controller flaws.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-rtems_status_code lpc32xx_i2c_write_with_optional_stop(
-  volatile lpc32xx_i2c *i2c,
-  const uint8_t *out,
-  size_t n,
-  bool stop
-);
-
-/**
- * @brief Starts a read transaction on the I2C module @a i2c.
- *
- * The address parameter @a addr must not contain the read/write bit.
- *
- * The error status may be delayed to the next
- * lpc32xx_i2c_read_with_optional_stop() due to controller flaws.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-rtems_status_code lpc32xx_i2c_read_start(
-  volatile lpc32xx_i2c *i2c,
-  unsigned addr
-);
-
-/**
- * @brief Reads data via the I2C module @a i2c with optional stop.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- * @retval RTEMS_NOT_IMPLEMENTED Stop is @a false.
- */
-rtems_status_code lpc32xx_i2c_read_with_optional_stop(
-  volatile lpc32xx_i2c *i2c,
-  uint8_t *in,
-  size_t n,
-  bool stop
-);
-
-/**
- * @brief Writes and reads data via the I2C module @a i2c.
- *
- * This will be one bus transaction.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-rtems_status_code lpc32xx_i2c_write_and_read(
-  volatile lpc32xx_i2c *i2c,
-  unsigned addr,
-  const uint8_t *out,
-  size_t out_size,
-  uint8_t *in,
-  size_t in_size
-);
-
-/**
- * @brief Writes data via the I2C module @a i2c.
- *
- * This will be one bus transaction.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-static inline rtems_status_code lpc32xx_i2c_write(
-  volatile lpc32xx_i2c *i2c,
-  unsigned addr,
-  const uint8_t *out,
-  size_t out_size
-)
-{
-  return lpc32xx_i2c_write_and_read(i2c, addr, out, out_size, NULL, 0);
-}
-
-/**
- * @brief Reads data via the I2C module @a i2c.
- *
- * This will be one bus transaction.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_IO_ERROR Received a NACK from the slave.
- */
-static inline rtems_status_code lpc32xx_i2c_read(
-  volatile lpc32xx_i2c *i2c,
-  unsigned addr,
-  uint8_t *in,
-  size_t in_size
-)
-{
-  return lpc32xx_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size);
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_I2C_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/irq.h b/c/src/lib/libbsp/arm/lpc32xx/include/irq.h
deleted file mode 100644
index fbb13b5262..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/irq.h
+++ /dev/null
@@ -1,179 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_interrupt
- *
- * @brief Interrupt definitions.
- */
-
-/*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_IRQ_H
-#define LIBBSP_ARM_LPC32XX_IRQ_H
-
-#ifndef ASM
-
-#include <rtems.h>
-#include <rtems/irq.h>
-#include <rtems/irq-extension.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_interrupt Interrupt Support
- *
- * @ingroup arm_lpc32xx
- *
- * @ingroup bsp_interrupt
- *
- * @{
- */
-
-#define LPC32XX_IRQ_INDEX(module, subindex) ((module) + (subindex))
-
-#define LPC32XX_IRQ_MODULE_MIC 0U
-#define LPC32XX_IRQ_MODULE_SIC_1 32U
-#define LPC32XX_IRQ_MODULE_SIC_2 64U
-#define LPC32XX_IRQ_MODULE_COUNT 3U
-
-/* MIC interrupts */
-#define LPC32XX_IRQ_SIC_1_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 0)
-#define LPC32XX_IRQ_SIC_2_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 1)
-#define LPC32XX_IRQ_TIMER_4_OR_MCPWM LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 3)
-#define LPC32XX_IRQ_TIMER_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 4)
-#define LPC32XX_IRQ_TIMER_HS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 5)
-#define LPC32XX_IRQ_WDG LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 6)
-#define LPC32XX_IRQ_UART_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 7)
-#define LPC32XX_IRQ_UART_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 8)
-#define LPC32XX_IRQ_UART_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 9)
-#define LPC32XX_IRQ_UART_6 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 10)
-#define LPC32XX_IRQ_NAND_FLASH LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 11)
-#define LPC32XX_IRQ_SDCARD_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 13)
-#define LPC32XX_IRQ_LCD LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 14)
-#define LPC32XX_IRQ_SDCARD_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 15)
-#define LPC32XX_IRQ_TIMER_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 16)
-#define LPC32XX_IRQ_TIMER_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 17)
-#define LPC32XX_IRQ_TIMER_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 18)
-#define LPC32XX_IRQ_TIMER_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 19)
-#define LPC32XX_IRQ_SSP_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 20)
-#define LPC32XX_IRQ_SSP_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 21)
-#define LPC32XX_IRQ_I2S_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 22)
-#define LPC32XX_IRQ_I2S_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 23)
-#define LPC32XX_IRQ_UART_7 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 24)
-#define LPC32XX_IRQ_UART_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 25)
-#define LPC32XX_IRQ_UART_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 26)
-#define LPC32XX_IRQ_TIMER_MS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 27)
-#define LPC32XX_IRQ_DMA LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 28)
-#define LPC32XX_IRQ_ETHERNET LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 29)
-#define LPC32XX_IRQ_SIC_1_FIQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 30)
-#define LPC32XX_IRQ_SIC_2_FIQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 31)
-
-/* SIC 1 interrupts */
-#define LPC32XX_IRQ_JTAG_COMM_TX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 1)
-#define LPC32XX_IRQ_JTAG_COMM_RX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 2)
-#define LPC32XX_IRQ_GPI_28 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 4)
-#define LPC32XX_IRQ_TS_P LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 6)
-#define LPC32XX_IRQ_TS_IRQ_OR_ADC LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 7)
-#define LPC32XX_IRQ_TS_AUX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 8)
-#define LPC32XX_IRQ_SPI_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 12)
-#define LPC32XX_IRQ_PLL_USB LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 13)
-#define LPC32XX_IRQ_PLL_HCLK LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 14)
-#define LPC32XX_IRQ_PLL_397 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 17)
-#define LPC32XX_IRQ_I2C_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 18)
-#define LPC32XX_IRQ_I2C_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 19)
-#define LPC32XX_IRQ_RTC LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 20)
-#define LPC32XX_IRQ_KEYSCAN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 22)
-#define LPC32XX_IRQ_SPI_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 23)
-#define LPC32XX_IRQ_SW LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 24)
-#define LPC32XX_IRQ_USB_OTG_TIMER LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 25)
-#define LPC32XX_IRQ_USB_OTG_ATX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 26)
-#define LPC32XX_IRQ_USB_HOST LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 27)
-#define LPC32XX_IRQ_USB_DEV_DMA LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 28)
-#define LPC32XX_IRQ_USB_DEV_LP LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 29)
-#define LPC32XX_IRQ_USB_DEV_HP LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 30)
-#define LPC32XX_IRQ_USB_I2C LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 31)
-
-/* SIC 2 interrupts */
-#define LPC32XX_IRQ_GPIO_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 0)
-#define LPC32XX_IRQ_GPIO_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 1)
-#define LPC32XX_IRQ_GPIO_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 2)
-#define LPC32XX_IRQ_GPIO_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 3)
-#define LPC32XX_IRQ_GPIO_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 4)
-#define LPC32XX_IRQ_GPIO_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 5)
-#define LPC32XX_IRQ_SPI_2_DATAIN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 6)
-#define LPC32XX_IRQ_UART_2_HCTS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 7)
-#define LPC32XX_IRQ_GPIO_P0_P1_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 8)
-#define LPC32XX_IRQ_GPI_8 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 9)
-#define LPC32XX_IRQ_GPI_9 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 10)
-#define LPC32XX_IRQ_GPI_19 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 11)
-#define LPC32XX_IRQ_UART_7_HCTS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 12)
-#define LPC32XX_IRQ_GPI_7 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 15)
-#define LPC32XX_IRQ_SDIO LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 18)
-#define LPC32XX_IRQ_UART_5_RX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 19)
-#define LPC32XX_IRQ_SPI_1_DATAIN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 20)
-#define LPC32XX_IRQ_GPI_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 22)
-#define LPC32XX_IRQ_GPI_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 23)
-#define LPC32XX_IRQ_GPI_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 24)
-#define LPC32XX_IRQ_GPI_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 25)
-#define LPC32XX_IRQ_GPI_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 26)
-#define LPC32XX_IRQ_GPI_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 27)
-#define LPC32XX_IRQ_GPI_6 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 28)
-#define LPC32XX_IRQ_SYSCLK LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 31)
-
-#define LPC32XX_IRQ_PRIORITY_VALUE_MIN 0U
-#define LPC32XX_IRQ_PRIORITY_VALUE_MAX 15U
-#define LPC32XX_IRQ_PRIORITY_COUNT (LPC32XX_IRQ_PRIORITY_VALUE_MAX + 1U)
-#define LPC32XX_IRQ_PRIORITY_HIGHEST LPC32XX_IRQ_PRIORITY_VALUE_MIN
-#define LPC32XX_IRQ_PRIORITY_LOWEST LPC32XX_IRQ_PRIORITY_VALUE_MAX
-
-#define BSP_INTERRUPT_VECTOR_MIN LPC32XX_IRQ_SIC_1_IRQ
-#define BSP_INTERRUPT_VECTOR_MAX LPC32XX_IRQ_SYSCLK
-
-#define LPC32XX_IRQ_COUNT (BSP_INTERRUPT_VECTOR_MAX + 1)
-
-void lpc32xx_irq_set_priority(rtems_vector_number vector, unsigned priority);
-
-unsigned lpc32xx_irq_get_priority(rtems_vector_number vector);
-
-typedef enum {
-  LPC32XX_IRQ_ACTIVE_LOW_OR_FALLING_EDGE,
-  LPC32XX_IRQ_ACTIVE_HIGH_OR_RISING_EDGE
-} lpc32xx_irq_activation_polarity;
-
-void lpc32xx_irq_set_activation_polarity(rtems_vector_number vector, lpc32xx_irq_activation_polarity activation_polarity);
-
-lpc32xx_irq_activation_polarity lpc32xx_irq_get_activation_polarity(rtems_vector_number vector);
-
-typedef enum {
-  LPC32XX_IRQ_LEVEL_SENSITIVE,
-  LPC32XX_IRQ_EDGE_SENSITIVE
-} lpc32xx_irq_activation_type;
-
-void lpc32xx_irq_set_activation_type(rtems_vector_number vector, lpc32xx_irq_activation_type activation_type);
-
-lpc32xx_irq_activation_type lpc32xx_irq_get_activation_type(rtems_vector_number vector);
-
-void lpc32xx_set_exception_handler(Arm_symbolic_exception_name exception, void (*handler)(void));
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* ASM */
-
-#endif /* LIBBSP_ARM_LPC32XX_IRQ_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h
deleted file mode 100644
index 2b676b433f..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc_clock
- *
- * @brief Clock driver configuration.
- */
-
-/*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H
-#define LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H
-
-#include <bsp.h>
-#include <bsp/irq.h>
-#include <bsp/lpc32xx.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc_clock Clock Support
- *
- * @ingroup lpc
- *
- * @brief Clock support.
- *
- * @{
- */
-
-#define LPC_CLOCK_INTERRUPT LPC32XX_IRQ_TIMER_0
-
-#define LPC_CLOCK_TIMER_BASE LPC32XX_BASE_TIMER_0
-
-#define LPC_CLOCK_TIMECOUNTER_BASE LPC32XX_BASE_TIMER_1
-
-#define LPC_CLOCK_REFERENCE LPC32XX_PERIPH_CLK
-
-#define LPC_CLOCK_MODULE_ENABLE()
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h
deleted file mode 100644
index 53e9e8415d..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc_eth
- *
- * @brief Ethernet driver configuration.
- */
-
-/*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H
-#define LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H
-
-#include <stdlib.h>
-#include <limits.h>
-
-#include <rtems.h>
-#include <rtems/malloc.h>
-
-#include <bsp.h>
-#include <bsp/lpc32xx.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc_eth Ethernet Support
- *
- * @ingroup lpc
- *
- * @brief Ethernet support.
- *
- * @{
- */
-
-#define LPC_ETH_CONFIG_INTERRUPT LPC32XX_IRQ_ETHERNET
-
-#define LPC_ETH_CONFIG_REG_BASE LPC32XX_BASE_ETHERNET
-
-#define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
-#define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX
-
-#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32
-#define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX
-
-#define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U
-
-#ifdef LPC32XX_ETHERNET_RMII
-  #define LPC_ETH_CONFIG_RMII
-
-  static void lpc_eth_config_module_enable(void)
-  {
-    LPC32XX_MAC_CLK_CTRL = 0x1f;
-  }
-#else
-  static void lpc_eth_config_module_enable(void)
-  {
-    LPC32XX_MAC_CLK_CTRL = 0x0f;
-  }
-#endif
-
-static void lpc_eth_config_module_disable(void)
-{
-  LPC32XX_MAC_CLK_CTRL = 0;
-}
-
-#define LPC_ETH_CONFIG_USE_TRANSMIT_DMA
-
-static char *lpc_eth_config_alloc_table_area(size_t size)
-{
-  return rtems_heap_allocate_aligned_with_boundary(size, 32, 0);
-}
-
-static void lpc_eth_config_free_table_area(char *table_area)
-{
-  /* FIXME: Type */
-  free(table_area, (int) 0xdeadbeef);
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h
deleted file mode 100644
index 2edb1e334e..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h
+++ /dev/null
@@ -1,641 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_reg
- *
- * @brief Register base addresses.
- */
-
-/*
- * Copyright (c) 2009, 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http:
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H
-#define LIBBSP_ARM_LPC32XX_LPC32XX_H
-
-#include <stdint.h>
-
-#include <bsp/utility.h>
-#include <bsp/lpc-timer.h>
-#include <bsp/lpc-dma.h>
-#include <bsp/lpc-i2s.h>
-#include <bsp/lpc-emc.h>
-
-/**
- * @defgroup lpc32xx_reg Register Definitions
- *
- * @ingroup arm_lpc32xx
- *
- * @brief Register definitions.
- *
- * @{
- */
-
-/**
- * @name Register Base Addresses
- *
- * @{
- */
-
-#define LPC32XX_BASE_ADC 0x40048000
-#define LPC32XX_BASE_SYSCON 0x40004000
-#define LPC32XX_BASE_DEBUG_CTRL 0x40040000
-#define LPC32XX_BASE_DMA 0x31000000
-#define LPC32XX_BASE_EMC 0x31080000
-#define LPC32XX_BASE_EMC_CS_0 0xe0000000
-#define LPC32XX_BASE_EMC_CS_1 0xe1000000
-#define LPC32XX_BASE_EMC_CS_2 0xe2000000
-#define LPC32XX_BASE_EMC_CS_3 0xe3000000
-#define LPC32XX_BASE_EMC_DYCS_0 0x80000000
-#define LPC32XX_BASE_EMC_DYCS_1 0xa0000000
-#define LPC32XX_BASE_ETB_CFG 0x310c0000
-#define LPC32XX_BASE_ETB_DATA 0x310e0000
-#define LPC32XX_BASE_ETHERNET 0x31060000
-#define LPC32XX_BASE_GPIO 0x40028000
-#define LPC32XX_BASE_I2C_1 0x400a0000
-#define LPC32XX_BASE_I2C_2 0x400a8000
-#define LPC32XX_BASE_I2S_0 0x20094000
-#define LPC32XX_BASE_I2S_1 0x2009c000
-#define LPC32XX_BASE_IRAM 0x08000000
-#define LPC32XX_BASE_IROM 0x0c000000
-#define LPC32XX_BASE_KEYSCAN 0x40050000
-#define LPC32XX_BASE_LCD 0x31040000
-#define LPC32XX_BASE_MCPWM 0x400e8000
-#define LPC32XX_BASE_MIC 0x40008000
-#define LPC32XX_BASE_NAND_MLC 0x200a8000
-#define LPC32XX_BASE_NAND_SLC 0x20020000
-#define LPC32XX_BASE_PWM_1 0x4005c000
-#define LPC32XX_BASE_PWM_2 0x4005c004
-#define LPC32XX_BASE_PWM_3 0x4002c000
-#define LPC32XX_BASE_PWM_4 0x40030000
-#define LPC32XX_BASE_RTC 0x40024000
-#define LPC32XX_BASE_RTC_RAM 0x40024080
-#define LPC32XX_BASE_SDCARD 0x20098000
-#define LPC32XX_BASE_SIC_1 0x4000c000
-#define LPC32XX_BASE_SIC_2 0x40010000
-#define LPC32XX_BASE_SPI_1 0x20088000
-#define LPC32XX_BASE_SPI_2 0x20090000
-#define LPC32XX_BASE_SSP_0 0x20084000
-#define LPC32XX_BASE_SSP_1 0x2008c000
-#define LPC32XX_BASE_TIMER_0 0x40044000
-#define LPC32XX_BASE_TIMER_1 0x4004c000
-#define LPC32XX_BASE_TIMER_2 0x40058000
-#define LPC32XX_BASE_TIMER_3 0x40060000
-#define LPC32XX_BASE_TIMER_5 0x4002c000
-#define LPC32XX_BASE_TIMER_6 0x40030000
-#define LPC32XX_BASE_TIMER_HS 0x40038000
-#define LPC32XX_BASE_TIMER_MS 0x40034000
-#define LPC32XX_BASE_UART_1 0x40014000
-#define LPC32XX_BASE_UART_2 0x40018000
-#define LPC32XX_BASE_UART_3 0x40080000
-#define LPC32XX_BASE_UART_4 0x40088000
-#define LPC32XX_BASE_UART_5 0x40090000
-#define LPC32XX_BASE_UART_6 0x40098000
-#define LPC32XX_BASE_UART_7 0x4001c000
-#define LPC32XX_BASE_USB 0x31020000
-#define LPC32XX_BASE_USB_OTG_I2C 0x31020300
-#define LPC32XX_BASE_WDT 0x4003c000
-
-/** @} */
-
-/**
- * @name Miscanellanous Registers
- *
- * @{
- */
-
-#define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0)
-#define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4)
-#define LPC32XX_U5CLK (*(volatile uint32_t *) 0x400040d8)
-#define LPC32XX_U6CLK (*(volatile uint32_t *) 0x400040dc)
-#define LPC32XX_IRDACLK (*(volatile uint32_t *) 0x400040e0)
-#define LPC32XX_UART_CTRL (*(volatile uint32_t *) 0x40054000)
-#define LPC32XX_UART_CLKMODE (*(volatile uint32_t *) 0x40054004)
-#define LPC32XX_UART_LOOP (*(volatile uint32_t *) 0x40054008)
-#define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8)
-#define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090)
-#define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c)
-#define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4)
-#define LPC32XX_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8)
-#define LPC32XX_OTG_STAT_CTRL (*(volatile uint32_t *) 0x31020110)
-#define LPC32XX_I2C_RX (*(volatile uint32_t *) 0x31020300)
-#define LPC32XX_I2C_TX (*(volatile uint32_t *) 0x31020300)
-#define LPC32XX_I2C_STS (*(volatile uint32_t *) 0x31020304)
-#define LPC32XX_I2C_CTL (*(volatile uint32_t *) 0x31020308)
-#define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c)
-#define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310)
-#define LPC32XX_PWR_CTRL (*(volatile uint32_t *) 0x40004044)
-#define LPC32XX_OSC_CTRL (*(volatile uint32_t *) 0x4000404c)
-#define LPC32XX_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050)
-#define LPC32XX_PLL397_CTRL (*(volatile uint32_t *) 0x40004048)
-#define LPC32XX_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058)
-#define LPC32XX_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040)
-#define LPC32XX_TEST_CLK (*(volatile uint32_t *) 0x400040a4)
-#define LPC32XX_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec)
-#define LPC32XX_START_ER_PIN (*(volatile uint32_t *) 0x40004030)
-#define LPC32XX_START_ER_INT (*(volatile uint32_t *) 0x40004020)
-#define LPC32XX_P0_INTR_ER (*(volatile uint32_t *) 0x40004018)
-#define LPC32XX_START_SR_PIN (*(volatile uint32_t *) 0x40004038)
-#define LPC32XX_START_SR_INT (*(volatile uint32_t *) 0x40004028)
-#define LPC32XX_START_RSR_PIN (*(volatile uint32_t *) 0x40004034)
-#define LPC32XX_START_RSR_INT (*(volatile uint32_t *) 0x40004024)
-#define LPC32XX_START_APR_PIN (*(volatile uint32_t *) 0x4000403c)
-#define LPC32XX_START_APR_INT (*(volatile uint32_t *) 0x4000402c)
-#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
-#define LPC32XX_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c)
-#define LPC32XX_MS_CTRL (*(volatile uint32_t *) 0x40004080)
-#define LPC32XX_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8)
-#define LPC32XX_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8)
-#define LPC32XX_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090)
-#define LPC32XX_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054)
-#define LPC32XX_I2S_CTRL (*(volatile uint32_t *) 0x4000407c)
-#define LPC32XX_SSP_CTRL (*(volatile uint32_t *) 0x40004078)
-#define LPC32XX_SPI_CTRL (*(volatile uint32_t *) 0x400040c4)
-#define LPC32XX_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac)
-#define LPC32XX_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0)
-#define LPC32XX_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc)
-#define LPC32XX_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4)
-#define LPC32XX_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060)
-#define LPC32XX_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0)
-#define LPC32XX_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8)
-#define LPC32XX_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4)
-#define LPC32XX_POS0_IRAM_CTRL (*(volatile uint32_t *) 0x40004110)
-#define LPC32XX_POS1_IRAM_CTRL (*(volatile uint32_t *) 0x40004114)
-#define LPC32XX_SDRAMCLK_CTRL (*(volatile uint32_t *) 0x40004068)
-
-/** @} */
-
-/**
- * @name Power Control Register (PWR_CTRL)
- *
- * @{
- */
-
-#define PWR_STOP BSP_BIT32(0)
-#define PWR_HIGHCORE_ALWAYS BSP_BIT32(1)
-#define PWR_NORMAL_RUN_MODE BSP_BIT32(2)
-#define PWR_SYSCLKEN_ALWAYS BSP_BIT32(3)
-#define PWR_SYSCLKEN_HIGH BSP_BIT32(4)
-#define PWR_HIGHCORE_HIGH BSP_BIT32(5)
-#define PWR_SDRAM_AUTO_REFRESH BSP_BIT32(7)
-#define PWR_UPDATE_EMCSREFREQ BSP_BIT32(8)
-#define PWR_EMCSREFREQ BSP_BIT32(9)
-#define PWR_HCLK_USES_PERIPH_CLK BSP_BIT32(10)
-
-/** @} */
-
-/**
- * @name HCLK PLL Control Register (HCLKPLL_CTRL)
- *
- * @{
- */
-
-#define HCLK_PLL_LOCK BSP_BIT32(0)
-#define HCLK_PLL_M(val) BSP_FLD32(val, 1, 8)
-#define HCLK_PLL_M_GET(reg) BSP_FLD32GET(reg, 1, 8)
-#define HCLK_PLL_N(val) BSP_FLD32(val, 9, 10)
-#define HCLK_PLL_N_GET(reg) BSP_FLD32GET(reg, 9, 10)
-#define HCLK_PLL_P(val) BSP_FLD32(val, 11, 12)
-#define HCLK_PLL_P_GET(reg) BSP_FLD32GET(reg, 11, 12)
-#define HCLK_PLL_FBD_FCLKOUT BSP_BIT32(13)
-#define HCLK_PLL_DIRECT BSP_BIT32(14)
-#define HCLK_PLL_BYPASS BSP_BIT32(15)
-#define HCLK_PLL_POWER BSP_BIT32(16)
-
-/** @} */
-
-/**
- * @name HCLK Divider Control Register (HCLKDIV_CTRL)
- *
- * @{
- */
-
-#define HCLK_DIV_HCLK(val) BSP_FLD32(val, 0, 1)
-#define HCLK_DIV_HCLK_GET(reg) BSP_FLD32GET(reg, 0, 1)
-#define HCLK_DIV_PERIPH_CLK(val) BSP_FLD32(val, 2, 6)
-#define HCLK_DIV_PERIPH_CLK_GET(reg) BSP_FLD32GET(reg, 2, 6)
-#define HCLK_DIV_DDRAM_CLK(val) BSP_FLD32(val, 7, 8)
-#define HCLK_DIV_DDRAM_CLK_GET(reg) BSP_FLD32GET(reg, 7, 8)
-
-/** @} */
-
-/**
- * @name Timer Clock Control Register (TIMCLK_CTRL)
- *
- * @{
- */
-
-#define TIMCLK_CTRL_WDT BSP_BIT32(0)
-#define TIMCLK_CTRL_HST BSP_BIT32(1)
-
-/** @} */
-
-#define LPC32XX_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)]
-#define LPC32XX_RESERVE(a, b) uint8_t reserved_ ## b [b - a]
-
-typedef struct {
-} lpc32xx_nand_slc;
-
-typedef struct {
-} lpc32xx_ssp;
-
-typedef struct {
-} lpc32xx_spi;
-
-typedef struct {
-} lpc32xx_sd_card;
-
-typedef struct {
-} lpc32xx_usb;
-
-typedef struct {
-} lpc32xx_lcd;
-
-typedef struct {
-} lpc32xx_etb;
-
-typedef struct {
-} lpc32xx_syscon;
-
-typedef struct {
-} lpc32xx_uart_ctrl;
-
-typedef struct {
-} lpc32xx_uart;
-
-typedef struct {
-} lpc32xx_ms_timer;
-
-typedef struct {
-} lpc32xx_hs_timer;
-
-/**
- * @name Watchdog Timer Interrupt Status Register (WDTIM_INT)
- *
- * @{
- */
-
-#define WDTTIM_INT_MATCH_INT BSP_BIT32(0)
-
-/** @} */
-
-/**
- * @name Watchdog Timer Control Register (WDTIM_CTRL)
- *
- * @{
- */
-
-#define WDTTIM_CTRL_COUNT_ENAB BSP_BIT32(0)
-#define WDTTIM_CTRL_RESET_COUNT BSP_BIT32(1)
-#define WDTTIM_CTRL_PAUSE_EN BSP_BIT32(2)
-
-/** @} */
-
-/**
- * @name Watchdog Timer Match Control Register (WDTIM_MCTRL)
- *
- * @{
- */
-
-#define WDTTIM_MCTRL_MR0_INT BSP_BIT32(0)
-#define WDTTIM_MCTRL_RESET_COUNT0 BSP_BIT32(1)
-#define WDTTIM_MCTRL_STOP_COUNT0 BSP_BIT32(2)
-#define WDTTIM_MCTRL_M_RES1 BSP_BIT32(3)
-#define WDTTIM_MCTRL_M_RES2 BSP_BIT32(4)
-#define WDTTIM_MCTRL_RESFRC1 BSP_BIT32(5)
-#define WDTTIM_MCTRL_RESFRC2 BSP_BIT32(6)
-
-/** @} */
-
-/**
- * @name Watchdog Timer External Match Control Register (WDTIM_EMR)
- *
- * @{
- */
-
-#define WDTTIM_EMR_EXT_MATCH0 BSP_BIT32(0)
-#define WDTTIM_EMR_MATCH_CTRL(val) BSP_FLD32(val, 4, 5)
-#define WDTTIM_EMR_MATCH_CTRL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 5)
-
-/** @} */
-
-/**
- * @name Watchdog Timer Reset Source Register (WDTIM_RES)
- *
- * @{
- */
-
-#define WDTTIM_RES_WDT BSP_BIT32(0)
-
-/** @} */
-
-typedef struct {
-  uint32_t intr;
-  uint32_t ctrl;
-  uint32_t counter;
-  uint32_t mctrl;
-  uint32_t match0;
-  uint32_t emr;
-  uint32_t pulse;
-  uint32_t res;
-} lpc32xx_wdt;
-
-typedef struct {
-} lpc32xx_debug;
-
-typedef struct {
-} lpc32xx_adc;
-
-typedef struct {
-} lpc32xx_keyscan;
-
-typedef struct {
-} lpc32xx_pwm;
-
-typedef struct {
-} lpc32xx_mcpwm;
-
-typedef struct {
-  uint32_t mac1;
-  uint32_t mac2;
-  uint32_t ipgt;
-  uint32_t ipgr;
-  uint32_t clrt;
-  uint32_t maxf;
-  uint32_t supp;
-  uint32_t test;
-  uint32_t mcfg;
-  uint32_t mcmd;
-  uint32_t madr;
-  uint32_t mwtd;
-  uint32_t mrdd;
-  uint32_t mind;
-  uint32_t reserved_0 [2];
-  uint32_t sa0;
-  uint32_t sa1;
-  uint32_t sa2;
-  uint32_t reserved_1 [45];
-  uint32_t command;
-  uint32_t status;
-  uint32_t rxdescriptor;
-  uint32_t rxstatus;
-  uint32_t rxdescriptornum;
-  uint32_t rxproduceindex;
-  uint32_t rxconsumeindex;
-  uint32_t txdescriptor;
-  uint32_t txstatus;
-  uint32_t txdescriptornum;
-  uint32_t txproduceindex;
-  uint32_t txconsumeindex;
-  uint32_t reserved_2 [10];
-  uint32_t tsv0;
-  uint32_t tsv1;
-  uint32_t rsv;
-  uint32_t reserved_3 [3];
-  uint32_t flowcontrolcnt;
-  uint32_t flowcontrolsts;
-  uint32_t reserved_4 [34];
-  uint32_t rxfilterctrl;
-  uint32_t rxfilterwolsts;
-  uint32_t rxfilterwolclr;
-  uint32_t reserved_5 [1];
-  uint32_t hashfilterl;
-  uint32_t hashfilterh;
-  uint32_t reserved_6 [882];
-  uint32_t intstatus;
-  uint32_t intenable;
-  uint32_t intclear;
-  uint32_t intset;
-  uint32_t reserved_7 [1];
-  uint32_t powerdown;
-} lpc32xx_eth;
-
-typedef struct {
-  uint32_t er;
-  uint32_t rsr;
-  uint32_t sr;
-  uint32_t apr;
-  uint32_t atr;
-  uint32_t itr;
-} lpc32xx_irq;
-
-typedef struct {
-  uint32_t p3_inp_state;
-  uint32_t p3_outp_set;
-  uint32_t p3_outp_clr;
-  uint32_t p3_outp_state;
-  uint32_t p2_dir_set;
-  uint32_t p2_dir_clr;
-  uint32_t p2_dir_state;
-  uint32_t p2_inp_state;
-  uint32_t p2_outp_set;
-  uint32_t p2_outp_clr;
-  uint32_t p2_mux_set;
-  uint32_t p2_mux_clr;
-  uint32_t p2_mux_state;
-  LPC32XX_RESERVE(0x034, 0x040);
-  uint32_t p0_inp_state;
-  uint32_t p0_outp_set;
-  uint32_t p0_outp_clr;
-  uint32_t p0_outp_state;
-  uint32_t p0_dir_set;
-  uint32_t p0_dir_clr;
-  uint32_t p0_dir_state;
-  LPC32XX_RESERVE(0x05c, 0x060);
-  uint32_t p1_inp_state;
-  uint32_t p1_outp_set;
-  uint32_t p1_outp_clr;
-  uint32_t p1_outp_state;
-  uint32_t p1_dir_set;
-  uint32_t p1_dir_clr;
-  uint32_t p1_dir_state;
-  LPC32XX_RESERVE(0x07c, 0x110);
-  uint32_t p3_mux_set;
-  uint32_t p3_mux_clr;
-  uint32_t p3_mux_state;
-  LPC32XX_RESERVE(0x11c, 0x120);
-  uint32_t p0_mux_set;
-  uint32_t p0_mux_clr;
-  uint32_t p0_mux_state;
-  LPC32XX_RESERVE(0x12c, 0x130);
-  uint32_t p1_mux_set;
-  uint32_t p1_mux_clr;
-  uint32_t p1_mux_state;
-} lpc32xx_gpio;
-
-typedef struct {
-  uint32_t rx_or_tx;
-  uint32_t stat;
-  uint32_t ctrl;
-  uint32_t clk_hi;
-  uint32_t clk_lo;
-  uint32_t adr;
-  uint32_t rxfl;
-  uint32_t txfl;
-  uint32_t rxb;
-  uint32_t txb;
-  uint32_t s_tx;
-  uint32_t s_txfl;
-} lpc32xx_i2c;
-
-typedef struct {
-  uint32_t ucount;
-  uint32_t dcount;
-  uint32_t match0;
-  uint32_t match1;
-  uint32_t ctrl;
-  uint32_t intstat;
-  uint32_t key;
-  uint32_t sram [32];
-} lpc32xx_rtc;
-
-typedef struct {
-  uint32_t control;
-  uint32_t status;
-  uint32_t timeout;
-  uint32_t reserved_0 [5];
-} lpc32xx_emc_ahb;
-
-typedef struct {
-  union {
-    uint32_t w32;
-    uint16_t w16;
-    uint8_t w8;
-  } buff;
-  uint32_t reserved_0 [8191];
-  union {
-    uint32_t w32;
-    uint16_t w16;
-    uint8_t w8;
-  } data;
-  uint32_t reserved_1 [8191];
-  uint32_t cmd;
-  uint32_t addr;
-  uint32_t ecc_enc;
-  uint32_t ecc_dec;
-  uint32_t ecc_auto_enc;
-  uint32_t ecc_auto_dec;
-  uint32_t rpr;
-  uint32_t wpr;
-  uint32_t rubp;
-  uint32_t robp;
-  uint32_t sw_wp_add_low;
-  uint32_t sw_wp_add_hig;
-  uint32_t icr;
-  uint32_t time;
-  uint32_t irq_mr;
-  uint32_t irq_sr;
-  uint32_t reserved_2;
-  uint32_t lock_pr;
-  uint32_t isr;
-  uint32_t ceh;
-} lpc32xx_nand_mlc;
-
-typedef struct {
-  lpc32xx_nand_slc nand_slc;
-  LPC32XX_FILL(0x20020000, 0x20084000, lpc32xx_nand_slc);
-  lpc32xx_ssp ssp_0;
-  LPC32XX_FILL(0x20084000, 0x20088000, lpc32xx_ssp); 
-  lpc32xx_spi spi_1;
-  LPC32XX_FILL(0x20088000, 0x2008c000, lpc32xx_spi);
-  lpc32xx_ssp ssp_1;
-  LPC32XX_FILL(0x2008c000, 0x20090000, lpc32xx_ssp);
-  lpc32xx_spi spi_2;
-  LPC32XX_FILL(0x20090000, 0x20094000, lpc32xx_spi);
-  lpc_i2s i2s_0;
-  LPC32XX_FILL(0x20094000, 0x20098000, lpc_i2s);
-  lpc32xx_sd_card sd_card;
-  LPC32XX_FILL(0x20098000, 0x2009c000, lpc32xx_sd_card);
-  lpc_i2s i2s_1;
-  LPC32XX_FILL(0x2009c000, 0x200a8000, lpc_i2s);
-  lpc32xx_nand_mlc nand_mlc;
-  LPC32XX_FILL(0x200a8000, 0x31000000, lpc32xx_nand_mlc);
-  lpc_dma dma;
-  LPC32XX_FILL(0x31000000, 0x31020000, lpc_dma);
-  lpc32xx_usb usb;
-  LPC32XX_FILL(0x31020000, 0x31040000, lpc32xx_usb);
-  lpc32xx_lcd lcd;
-  LPC32XX_FILL(0x31040000, 0x31060000, lpc32xx_lcd);
-  lpc32xx_eth eth;
-  LPC32XX_FILL(0x31060000, 0x31080000, lpc32xx_eth);
-  lpc_emc emc;
-  LPC32XX_FILL(0x31080000, 0x31080400, lpc_emc);
-  lpc32xx_emc_ahb emc_ahb [5];
-  LPC32XX_FILL(0x31080400, 0x310c0000, lpc32xx_emc_ahb [5]);
-  lpc32xx_etb etb;
-  LPC32XX_FILL(0x310c0000, 0x40004000, lpc32xx_etb);
-  lpc32xx_syscon syscon;
-  LPC32XX_FILL(0x40004000, 0x40008000, lpc32xx_syscon);
-  lpc32xx_irq mic;
-  LPC32XX_FILL(0x40008000, 0x4000c000, lpc32xx_irq);
-  lpc32xx_irq sic_1;
-  LPC32XX_FILL(0x4000c000, 0x40010000, lpc32xx_irq);
-  lpc32xx_irq sic_2;
-  LPC32XX_FILL(0x40010000, 0x40014000, lpc32xx_irq);
-  lpc32xx_uart uart_1;
-  LPC32XX_FILL(0x40014000, 0x40018000, lpc32xx_uart);
-  lpc32xx_uart uart_2;
-  LPC32XX_FILL(0x40018000, 0x4001c000, lpc32xx_uart);
-  lpc32xx_uart uart_7;
-  LPC32XX_FILL(0x4001c000, 0x40024000, lpc32xx_uart);
-  lpc32xx_rtc rtc;
-  LPC32XX_FILL(0x40024000, 0x40028000, lpc32xx_rtc);
-  lpc32xx_gpio gpio;
-  LPC32XX_FILL(0x40028000, 0x4002c000, lpc32xx_gpio);
-  lpc_timer timer_4;
-  LPC32XX_FILL(0x4002c000, 0x40030000, lpc_timer);
-  lpc_timer timer_5;
-  LPC32XX_FILL(0x40030000, 0x40034000, lpc_timer);
-  lpc32xx_ms_timer ms_timer;
-  LPC32XX_FILL(0x40034000, 0x40038000, lpc32xx_ms_timer);
-  lpc32xx_hs_timer hs_timer;
-  LPC32XX_FILL(0x40038000, 0x4003c000, lpc32xx_hs_timer);
-  lpc32xx_wdt wdt;
-  LPC32XX_FILL(0x4003c000, 0x40040000, lpc32xx_wdt);
-  lpc32xx_debug debug;
-  LPC32XX_FILL(0x40040000, 0x40044000, lpc32xx_debug);
-  lpc_timer timer_0;
-  LPC32XX_FILL(0x40044000, 0x40048000, lpc_timer);
-  lpc32xx_adc adc;
-  LPC32XX_FILL(0x40048000, 0x4004c000, lpc32xx_adc);
-  lpc_timer timer_1;
-  LPC32XX_FILL(0x4004c000, 0x40050000, lpc_timer);
-  lpc32xx_keyscan keyscan;
-  LPC32XX_FILL(0x40050000, 0x40054000, lpc32xx_keyscan);
-  lpc32xx_uart_ctrl uart_ctrl;
-  LPC32XX_FILL(0x40054000, 0x40058000, lpc32xx_uart_ctrl);
-  lpc_timer timer_2;
-  LPC32XX_FILL(0x40058000, 0x4005c000, lpc_timer);
-  lpc32xx_pwm pwm_1_and_pwm_2;
-  LPC32XX_FILL(0x4005c000, 0x40060000, lpc32xx_pwm);
-  lpc_timer timer3;
-  LPC32XX_FILL(0x40060000, 0x40080000, lpc_timer);
-  lpc32xx_uart uart_3;
-  LPC32XX_FILL(0x40080000, 0x40088000, lpc32xx_uart);
-  lpc32xx_uart uart_4;
-  LPC32XX_FILL(0x40088000, 0x40090000, lpc32xx_uart);
-  lpc32xx_uart uart_5;
-  LPC32XX_FILL(0x40090000, 0x40098000, lpc32xx_uart);
-  lpc32xx_uart uart_6;
-  LPC32XX_FILL(0x40098000, 0x400a0000, lpc32xx_uart);
-  lpc32xx_i2c i2c_1;
-  LPC32XX_FILL(0x400a0000, 0x400a8000, lpc32xx_i2c);
-  lpc32xx_i2c i2c_2;
-  LPC32XX_FILL(0x400a8000, 0x400e8000, lpc32xx_i2c);
-  lpc32xx_mcpwm mcpwm;
-} lpc32xx_registers;
-
-extern volatile lpc32xx_registers lpc32xx;
-
-/** @} */
-
-#endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h b/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h
deleted file mode 100644
index 32352b5ed9..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_mmu
- *
- * @brief MMU support API.
- */
-
-/*
- * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Obere Lagerstr. 30
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_MMU_H
-#define LIBBSP_ARM_LPC32XX_MMU_H
-
-#include <libcpu/arm-cp15.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_mmu MMU Support
- *
- * @ingroup arm_lpc32xx
- *
- * @brief MMU support.
- *
- * @{
- */
-
-#define LPC32XX_MMU_CLIENT_DOMAIN 15U
-
-#define LPC32XX_MMU_READ_ONLY \
-  ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
-    | ARM_MMU_SECT_DEFAULT)
-
-#define LPC32XX_MMU_READ_ONLY_CACHED \
-  (LPC32XX_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
-
-#define LPC32XX_MMU_READ_WRITE \
-  ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
-    | ARM_MMU_SECT_AP_0 \
-    | ARM_MMU_SECT_DEFAULT)
-
-#define LPC32XX_MMU_READ_WRITE_CACHED \
-  (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
-
-/**
- * @brief Sets the @a section_flags for the address range [@a begin, @a end).
- *
- * @return Previous section flags of the first modified entry.
- */
-static inline uint32_t lpc32xx_set_translation_table_entries(
-  const void *begin,
-  const void *end,
-  uint32_t section_flags
-)
-{
-  return arm_cp15_set_translation_table_entries(begin, end, section_flags);
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_MMU_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h b/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h
deleted file mode 100644
index 2aa8312945..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h
+++ /dev/null
@@ -1,422 +0,0 @@
-/**
- * @file
- *
- * @ingroup lpc32xx_nand_mlc
- *
- * @brief NAND MLC controller API.
- */
-
-/*
- * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Obere Lagerstr. 30
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * Copyright (c) 2011 Stephan Hoffmann <sho@reLinux.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_LPC32XX_NAND_MLC_H
-#define LIBBSP_ARM_LPC32XX_NAND_MLC_H
-
-#include <rtems.h>
-
-#include <bsp/utility.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/**
- * @defgroup lpc32xx_nand_mlc NAND MLC Controller
- *
- * @ingroup arm_lpc32xx
- *
- * @brief NAND MLC Controller.
- *
- * Timing constraints:
- *
- * -# (WR_LOW + 1) / HCLK >= tWP
- * -# (WR_HIGH - WR_LOW) / HCLK >= tWH
- * -# (WR_LOW + 1) / HCLK + (WR_HIGH - WR_LOW) / HCLK >= tWC
- * -# (RD_LOW + 1) / HCLK >= tRP
- * -# (RD_LOW + 1) / HCLK >= tREA + tSU
- * -# (RD_HIGH - RD_LOW) / HCLK >= tREH
- * -# (RD_LOW + 1) / HCLK + (RD_HIGH - RD_LOW) / HCLK >= tRC
- * -# (RD_HIGH - RD_LOW) / HCLK + NAND_TA / HCLK >= tRHZ
- * -# BUSY_DELAY / HCLK >= max(tWB, tRB)
- * -# TCEA_DELAY / HCLK >= tCEA - tREA
- *
- * Known flash layouts (Format: SP = small pages, LP = large pages / address
- * cycles / pages per block):
- *
- * -# SP/3/32
- * -# SP/4/32
- * -# LP/4/64
- * -# LP/5/64
- * -# LP/5/128
- *
- * @{
- */
-
-/**
- * @name MLC NAND Flash Dimensions
- *
- * @{
- */
-
-#define MLC_SMALL_PAGE_SIZE 528
-#define MLC_SMALL_DATA_SIZE 512
-#define MLC_SMALL_SPARE_SIZE 16
-#define MLC_SMALL_USER_SPARE_SIZE 6
-#define MLC_SMALL_ECC_SPARE_SIZE 10
-#define MLC_SMALL_DATA_WORD_COUNT (MLC_SMALL_DATA_SIZE / 4)
-#define MLC_SMALL_SPARE_WORD_COUNT (MLC_SMALL_SPARE_SIZE / 4)
-#define MLC_SMALL_PAGES_PER_LARGE_PAGE 4
-#define MLC_LARGE_PAGE_SIZE \
-  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_PAGE_SIZE)
-#define MLC_LARGE_DATA_SIZE \
-  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_DATA_SIZE)
-#define MLC_LARGE_SPARE_SIZE \
-  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_SPARE_SIZE)
-#define MLC_LARGE_DATA_WORD_COUNT (MLC_LARGE_DATA_SIZE / 4)
-#define MLC_LARGE_SPARE_WORD_COUNT (MLC_LARGE_SPARE_SIZE / 4)
-
-/** @} */
-
-/**
- * @name NAND Flash Clock Control Register (FLASHCLK_CTRL)
- *
- * @{
- */
-
-#define FLASHCLK_IRQ_MLC BSP_BIT32(5)
-#define FLASHCLK_MLC_DMA_RNB BSP_BIT32(4)
-#define FLASHCLK_MLC_DMA_INT BSP_BIT32(3)
-#define FLASHCLK_SELECT_SLC BSP_BIT32(2)
-#define FLASHCLK_MLC_CLK_ENABLE BSP_BIT32(1)
-#define FLASHCLK_SLC_CLK_ENABLE BSP_BIT32(0)
-
-/** @} */
-
-/**
- * @name MLC NAND Timing Register (MLC_TIME_REG)
- *
- * @{
- */
-
-#define MLC_TIME_WR_LOW(val) BSP_FLD32(val, 0, 3)
-#define MLC_TIME_WR_HIGH(val) BSP_FLD32(val, 4, 7)
-#define MLC_TIME_RD_LOW(val) BSP_FLD32(val, 8, 11)
-#define MLC_TIME_RD_HIGH(val) BSP_FLD32(val, 12, 15)
-#define MLC_TIME_NAND_TA(val) BSP_FLD32(val, 16, 18)
-#define MLC_TIME_BUSY_DELAY(val) BSP_FLD32(val, 19, 23)
-#define MLC_TIME_TCEA_DELAY(val) BSP_FLD32(val, 24, 25)
-
-/** @} */
-
-/**
- * @name MLC NAND Lock Protection Register (MLC_LOCK_PR)
- *
- * @{
- */
-
-#define MLC_UNLOCK_PROT 0xa25e
-
-/** @} */
-
-/**
- * @name MLC NAND Status Register (MLC_ISR)
- *
- * @{
- */
-
-#define MLC_ISR_DECODER_FAILURE BSP_BIT32(6)
-#define MLC_ISR_SYMBOL_ERRORS(reg) BSP_FLD32GET(reg, 4, 5)
-#define MLC_ISR_ERRORS_DETECTED BSP_BIT32(3)
-#define MLC_ISR_ECC_READY BSP_BIT32(2)
-#define MLC_ISR_CONTROLLER_READY BSP_BIT32(1)
-#define MLC_ISR_NAND_READY BSP_BIT32(0)
-
-/** @} */
-
-/**
- * @name MLC NAND Controller Configuration Register (MLC_ICR)
- *
- * @{
- */
-
-#define MLC_ICR_SOFT_WRITE_PROT BSP_BIT32(3)
-#define MLC_ICR_LARGE_PAGES BSP_BIT32(2)
-#define MLC_ICR_ADDR_WORD_COUNT_4_5 BSP_BIT32(1)
-#define MLC_ICR_IO_BUS_16 BSP_BIT32(0)
-
-/** @} */
-
-/**
- * @name MLC NAND Auto Encode Register (MLC_ECC_AUTO_ENC)
- *
- * @{
- */
-
-#define MLC_ECC_AUTO_ENC_PROGRAM BSP_BIT32(8)
-
-/** @} */
-
-/**
- * @name NAND Status Register
- *
- * @{
- */
-
-#define NAND_STATUS_ERROR (1U << 0)
-#define NAND_STATUS_READY (1U << 6)
-#define NAND_STATUS_NOT_PROTECTED (1U << 7)
-
-/** @} */
-
-/**
- * @brief MLC NAND controller configuration.
- */
-typedef struct {
-  uint32_t flags;
-
-  uint32_t block_count;
-
-  /**
-   * @brief Value for the MLC NAND Timing Register (MLC_TIME_REG).
-   */
-  uint32_t time;
-} lpc32xx_mlc_config;
-
-/**
- * @brief Selects small pages (512 Bytes user data and 16 Bytes spare data)
- * or large pages (2048 Bytes user data and 64 Bytes spare data) if not set.
- */
-#define MLC_SMALL_PAGES 0x1U
-
-/**
- * @Brief Selects 4/5 address cycles for small/large pages or 3/4 address
- * cycles if not set.
- */
-#define MLC_MANY_ADDRESS_CYCLES 0x2U
-
-/**
- * @brief Selects 64 pages per block or 128 pages per block if not set.
- *
- * This flag is only valid for large pages.
- */
-#define MLC_NORMAL_BLOCKS 0x4U
-
-/**
- * @brief Selects 16-bit IO width or 8-bit IO width if not set.
- */
-#define MLC_IO_WIDTH_16_BIT 0x8U
-
-/**
- * @brief Initializes the MLC NAND controller according to @a cfg.
- */
-void lpc32xx_mlc_init(const lpc32xx_mlc_config *cfg);
-
-uint32_t lpc32xx_mlc_page_size(void);
-
-uint32_t lpc32xx_mlc_pages_per_block(void);
-
-uint32_t lpc32xx_mlc_block_count(void);
-
-uint32_t lpc32xx_mlc_io_width(void);
-
-void lpc32xx_mlc_write_protection(
-  uint32_t page_index_low,
-  uint32_t page_index_high
-);
-
-void lpc32xx_mlc_read_id(uint8_t *id, size_t n);
-
-/**
- * @brief Reads the page with index @a page_index.
- *
- * Bytes 6 to 15 of the spare area will contain the ECC.
- *
- * If the read is successful, then the @a symbol_error_count will contain the
- * number of detected symbol errors (0, 1, 2, 3, or 4), else the value will be
- * 0xffffffff.  The @a symbol_error_count pointer may be @c NULL.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid @a page_index value.
- * @retval RTEMS_IO_ERROR Uncorrectable bit error.
- */
-rtems_status_code lpc32xx_mlc_read_page(
-  uint32_t page_index,
-  void *data,
-  void *spare,
-  uint32_t *symbol_error_count
-);
-
-/**
- * @brief Checks if the block with index @a block_index is valid.
- *
- * The initial valid block information of the manufacturer will be used.
- * Unfortunately there seems to be no standard for this.  A block will be
- * considered as bad if the first or second page of this block does not contain
- * 0xff at the 6th byte of the spare area.  This should work for flashes with
- * small pages and a 8-bit IO width.
- *
- * @retval RTEMS_SUCCESSFUL The block is valid.
- * @retval RTEMS_INVALID_ID Invalid @a block_index value.
- * @retval RTEMS_IO_ERROR Uncorrectable bit error.
- * @retval RTEMS_INCORRECT_STATE The block is bad.
- * @retval RTEMS_NOT_IMPLEMENTED No implementation available for this flash
- * type.
- */
-rtems_status_code lpc32xx_mlc_is_valid_block(uint32_t block_index);
-
-/**
- * @brief Erases the block with index @a block_index.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid @a block_index value.
- * @retval RTEMS_UNSATISFIED Erase error.
- */
-rtems_status_code lpc32xx_mlc_erase_block(uint32_t block_index);
-
-/**
- * @brief Erases the block with index @a block_index.
- *
- * In case of an erase error all pages and the spare areas of this block are
- * programmed with zero values.  This will hopefully mark the block as bad.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INCORRECT_STATE The block is bad.
- * @retval RTEMS_INVALID_ID Invalid @a block_index value.
- * @retval RTEMS_UNSATISFIED Erase error.
- * @retval RTEMS_NOT_IMPLEMENTED No implementation available for this flash
- * type.
- */
-rtems_status_code lpc32xx_mlc_erase_block_safe(uint32_t block_index);
-
-/**
- * @brief Erases the block with index @a block_index.
- *
- * Variant of lpc32xx_mlc_erase_block_safe() with more parameters for
- * efficiency reasons.  The @a page_begin must be the index of the first page
- * of the block.  The @a page_end must be the page index of the last page of
- * the block plus one.
- */
-rtems_status_code lpc32xx_mlc_erase_block_safe_3(
-  uint32_t block_index,
-  uint32_t page_begin,
-  uint32_t page_end
-);
-
-/**
- * @brief Writes zero values to the pages specified by @a page_begin and
- * @a page_end.
- *
- * The data and spare area are cleared to zero.  This marks the pages as bad.
- */
-void lpc32xx_mlc_zero_pages(uint32_t page_begin, uint32_t page_end);
-
-/**
- * @brief Writes the page with index @a page_index.
- *
- * Only the bytes 0 to 5 of the spare area can be used for user data, the bytes
- * 6 to 15 will be used for the automatically generated ECC.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid @a page_index value.
- * @retval RTEMS_IO_ERROR Write error.
- */
-rtems_status_code lpc32xx_mlc_write_page_with_ecc(
-  uint32_t page_index,
-  const void *data,
-  const void *spare
-);
-
-/**
- * @brief Writes @a src_size Bytes from @a src to the flash area specified by
- * @a block_begin and @a block_end.
- *
- * The @a page_buffer will be used as an intermediate buffer.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid @a block_begin or @a block_end value.
- * @retval RTEMS_IO_ERROR Too many bad blocks or source area too big.
- */
-rtems_status_code lpc32xx_mlc_write_blocks(
-  uint32_t block_begin,
-  uint32_t block_end,
-  const void *src,
-  size_t src_size,
-  uint32_t page_buffer [MLC_LARGE_DATA_WORD_COUNT]
-);
-
-/**
- * @brief Read blocks process function type.
- *
- * @see lpc32xx_mlc_read_blocks().
- *
- * @retval false Continue processing.
- * @retval true Stop processing.
- */
-typedef bool (*lpc32xx_mlc_read_process)(
-  void *process_arg,
-  uint32_t page_index,
-  uint32_t page_size,
-  uint32_t page_data [MLC_LARGE_DATA_WORD_COUNT],
-  uint32_t page_spare [MLC_LARGE_SPARE_WORD_COUNT]
-);
-
-/**
- * @brief Reads the pages of block @a block_begin up to and excluding
- * @a block_end.
- *
- * For each page @a process will be called with the @a process_arg parameter,
- * the page_index, the page data and the page spare.
- *
- * The @a page_buffer_0 and @a page_buffer_1 will be used as
- * intermediate buffers.
- */
-rtems_status_code lpc32xx_mlc_read_blocks(
-  uint32_t block_begin,
-  uint32_t block_end,
-  lpc32xx_mlc_read_process process,
-  void *process_arg,
-  uint32_t page_buffer_0 [MLC_LARGE_DATA_WORD_COUNT],
-  uint32_t page_buffer_1 [MLC_LARGE_DATA_WORD_COUNT]
-);
-
-/**
- * @brief Checks if the page spare area indicates to a bad page.
- *
- * If the first (byte offset 0) or sixth (byte offset 5) byte of the spare area
- * has a value other than 0xff, then it returns @a true (the page is bad), else
- * it returns @a false (the page is not bad).
- *
- * Samsung uses the sixth byte to indicate a bad page.  Mircon uses the first
- * and sixth byte to indicate a bad page.
- *
- * This functions works only for small page flashes.
- */
-static inline bool lpc32xx_mlc_is_bad_page(const uint32_t *spare)
-{
-  uint32_t first_byte_mask = 0x000000ff;
-  uint32_t sixth_byte_mask = 0x0000ff00;
-
-  return (spare [0] & first_byte_mask) != first_byte_mask
-    || (spare [1] & sixth_byte_mask) != sixth_byte_mask;
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_LPC32XX_NAND_MLC_H */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h b/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h
deleted file mode 100644
index 4cbc17a085..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/* @file 
- *
- * @ingroup arm_lpc32xx
- *
- * @brief Implementations of interrupt mechanisms for Time Test 27
- */
-
-/*
- * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Obere Lagerstr. 30
- *  82178 Puchheim
- *  Germany
- *  <info@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _RTEMS_TMTEST27
-#error "This is an RTEMS internal file you must not include directly."
-#endif
-
-#ifndef __tm27_h
-#define __tm27_h
-
-#include <assert.h>
-
-#include <rtems.h>
-
-#include <bsp/lpc32xx.h>
-#include <bsp/irq.h>
-#include <bsp/irq-generic.h>
-
-#define MUST_WAIT_FOR_INTERRUPT 1
-
-static void Install_tm27_vector(void (*handler)(rtems_vector_number))
-{
-  rtems_status_code sc = RTEMS_SUCCESSFUL;
-
-  LPC32XX_SW_INT = 0;
-
-  sc = rtems_interrupt_handler_install(
-    LPC32XX_IRQ_SW,
-    "SW",
-    RTEMS_INTERRUPT_UNIQUE,
-    (rtems_interrupt_handler) handler,
-    NULL
-  );
-  assert(sc == RTEMS_SUCCESSFUL);
-}
-
-static void Cause_tm27_intr(void)
-{
-  LPC32XX_SW_INT = 0x1;
-}
-
-static void Clear_tm27_intr(void)
-{
-  LPC32XX_SW_INT = 0;
-  lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_LOWEST);
-}
-
-static void Lower_tm27_intr(void)
-{
-  bsp_interrupt_vector_enable(LPC32XX_IRQ_SW);
-  lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_HIGHEST);
-}
-
-#endif /* __tm27_h */
diff --git a/c/src/lib/libbsp/arm/lpc32xx/preinstall.am b/c/src/lib/libbsp/arm/lpc32xx/preinstall.am
deleted file mode 100644
index bc2133286c..0000000000
--- a/c/src/lib/libbsp/arm/lpc32xx/preinstall.am
+++ /dev/null
@@ -1,163 +0,0 @@
-## Automatically generated by ampolish3 - Do not edit
-
-if AMPOLISH3
-$(srcdir)/preinstall.am: Makefile.am
-	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
-endif
-
-PREINSTALL_DIRS =
-DISTCLEANFILES += $(PREINSTALL_DIRS)
-
-all-am: $(PREINSTALL_FILES)
-
-PREINSTALL_FILES =
-CLEANFILES = $(PREINSTALL_FILES)
-
-all-local: $(TMPINSTALL_FILES)
-
-TMPINSTALL_FILES =
-CLEANFILES += $(TMPINSTALL_FILES)
-
-$(PROJECT_LIB)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_LIB)
-	@: > $(PROJECT_LIB)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)
-	@: > $(PROJECT_INCLUDE)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
-PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
-
-$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-
-$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
-
-$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-
-$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
-
-$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
-
-$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
-
-$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
-
-$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
-
-$(PROJECT_INCLUDE)/bsp/uart-output-char.h: ../../shared/include/uart-output-char.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart-output-char.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart-output-char.h
-
-$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
-
-$(PROJECT_INCLUDE)/bsp/arm-cp15-start.h: ../shared/include/arm-cp15-start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-cp15-start.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-cp15-start.h
-
-$(PROJECT_INCLUDE)/bsp/arm-errata.h: ../shared/include/arm-errata.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-errata.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-errata.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-timer.h: ../shared/lpc/include/lpc-timer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-timer.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-timer.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-i2s.h: ../shared/lpc/include/lpc-i2s.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-emc.h: ../shared/lpc/include/lpc-emc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-emc.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-emc.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-lcd.h: ../shared/lpc/include/lpc-lcd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
-
-$(PROJECT_INCLUDE)/bsp/arm-release-id.h: ../shared/include/arm-release-id.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-release-id.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-release-id.h
-
-$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
-
-$(PROJECT_INCLUDE)/bsp/mmu.h: include/mmu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mmu.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mmu.h
-
-$(PROJECT_INCLUDE)/bsp/lpc32xx.h: include/lpc32xx.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc32xx.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc32xx.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-clock-config.h: include/lpc-clock-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-clock-config.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-clock-config.h
-
-$(PROJECT_INCLUDE)/bsp/lpc-ethernet-config.h: include/lpc-ethernet-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-ethernet-config.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-ethernet-config.h
-
-$(PROJECT_INCLUDE)/bsp/nand-mlc.h: include/nand-mlc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/nand-mlc.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/nand-mlc.h
-
-$(PROJECT_INCLUDE)/bsp/boot.h: include/boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/boot.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/boot.h
-
-$(PROJECT_INCLUDE)/bsp/hsu.h: include/hsu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hsu.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hsu.h
-
-$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
-
-$(PROJECT_INCLUDE)/bsp/emc.h: include/emc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/emc.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/emc.h
-
-$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
-
-$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
-TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-
-$(PROJECT_LIB)/linkcmds.lpc32xx: startup/linkcmds.lpc32xx $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.lpc32xx
-TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.lpc32xx
-
diff --git a/c/src/lib/libbsp/arm/lpc32xx/bsp_specs b/c/src/lib/libbsp/arm/lpc32xx/startup/bsp_specs
index 47dd31d46b..47dd31d46b 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/bsp_specs
+++ b/c/src/lib/libbsp/arm/lpc32xx/startup/bsp_specs
author	Chris Johns <chrisj@rtems.org>	2017-12-23 18:18:56 +1100
committer	Sebastian Huber <sebastian.huber@embedded-brains.de>	2018-01-25 08:45:26 +0100
commit	2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree	44759efe9374f13200a97e96d91bd9a2b7e5ce2a /c/src/lib/libbsp/arm/lpc32xx
parent	MAINTAINERS: Add myself to Write After Approval. (diff)
download	rtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2