Changes throughout.

8 files changed, 232 insertions, 34 deletions

diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
index bb156b01aa..e1f06b2ee3 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
@@ -3,7 +3,7 @@
  *
  * @ingroup lpc24xx
  *
- * @brief Global BSP variables and functions.
+ * @brief Global BSP definitions.
  */
 
 /*
@@ -35,25 +35,59 @@ extern "C" {
 
 #ifndef ASM
 
-/* Network driver configuration */
-
 struct rtems_bsdnet_ifconfig;
 
+/**
+ * @defgroup lpc24xx LPC24XX Support
+ *
+ * @ingroup bsp_kit
+ *
+ * @brief LPC24XX support package.
+ *
+ * @{
+ */
+
+/**
+ * @brief Network driver attach and detach function.
+ */
 int lpc24xx_eth_attach_detach(
   struct rtems_bsdnet_ifconfig *config,
   int attaching
 );
 
+/**
+ * @brief Standard network driver attach and detach function.
+ */
 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH	lpc24xx_eth_attach_detach
 
+/**
+ * @brief Standard network driver name.
+ */
 #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
 
-/*
- *  BSP specific idle thread
+/**
+ * @brief Optimized idle task.
+ *
+ * This idle task sets the power mode to idle.  This causes the processor clock
+ * to be stopped, while on-chip peripherals remain active.  Any enabled
+ * interrupt from a peripheral or an external interrupt source will cause the
+ * processor to resume execution.
+ *
+ * To enable the idle task use the following in the system configuration:
+ *
+ * @code
+ * #include <bsp.h>
+ * 
+ * #define CONFIGURE_INIT
+ *
+ * #define CONFIGURE_IDLE_TASK_BODY lpc24xx_idle
+ *
+ * #include <confdefs.h>
+ * @endcode
  */
-void *bsp_idle_thread( uint32_t ignored);
+void *lpc24xx_idle(uintptr_t ignored);
 
-#define BSP_IDLE_TASK_BODY bsp_idle_thread
+/** @} */
 
 #endif /* ASM */
 
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/dma.h b/c/src/lib/libbsp/arm/lpc24xx/include/dma.h
index 0871372a2c..2f49b1d249 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/dma.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/dma.h
@@ -1,9 +1,9 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_dma
  *
- * @brief DMA support.
+ * @brief Direct memory access (DMA) support.
  */
 
 /*
@@ -12,10 +12,11 @@
  * Obere Lagerstr. 30
  * D-82178 Puchheim
  * Germany
- * rtems@embedded-brains.de
+ * <rtems@embedded-brains.de>
  *
- * The license and distribution terms for this file may be found in the file
- * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
  */
 
 #ifndef LIBBSP_ARM_LPC24XX_DMA_H
@@ -27,14 +28,66 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @defgroup lpc24xx_dma DMA Support
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Direct memory access (DMA) support.
+ *
+ * @{
+ */
+
+/**
+ * @brief Initializes the general purpose DMA.
+ */
 void lpc24xx_dma_initialize(void);
 
+/**
+ * @brief Tries to obtain the DMA channel @a channel.
+ *
+ * @retval RTEMS_SUCCESSFUL Successful operation.
+ * @retval RTEMS_INVALID_ID Invalid channel number.
+ * @retval RTEMS_RESOURCE_IN_USE Channel already occupied.
+ */
 rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel);
 
+/**
+ * @brief Releases the DMA channel @a channel.
+ *
+ * You must have obtained this channel with lpc24xx_dma_channel_obtain()
+ * previously.
+ *
+ * If the channel number @a channel is out of range nothing will happen.
+ */
 void lpc24xx_dma_channel_release(unsigned channel);
 
+/**
+ * @brief Disables the DMA channel @a channel.
+ *
+ * If @a force is @c false the channel will be halted and disabled when the
+ * channel is inactive otherwise it will be disabled immediately.
+ *
+ * If the channel number @a channel is out of range nothing will happen.
+ */
 void lpc24xx_dma_channel_disable(unsigned channel, bool force);
 
+rtems_status_code lpc24xx_dma_copy_initialize(void);
+
+rtems_status_code lpc24xx_dma_copy_release(void);
+
+rtems_status_code lpc24xx_dma_copy(
+  unsigned channel,
+  void *dest,
+  const void *src,
+  size_t n,
+  size_t width
+);
+
+rtems_status_code lpc24xx_dma_copy_wait(unsigned channel);
+
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h b/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h
index f15ade1aad..a6eeee35b0 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h
@@ -1,9 +1,9 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_libi2c
  *
- * LibI2C bus driver for the I2C modules.
+ * @brief LibI2C bus driver for the I2C modules.
  */
 
 /*
@@ -28,12 +28,24 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @defgroup lpc24xx_libi2c LPC24XX Bus Drivers
+ *
+ * @ingroup libi2c
+ *
+ * @brief LibI2C bus drivers for LPC24XX.
+ *
+ * @{
+ */
+
 extern rtems_libi2c_bus_t * const lpc24xx_i2c_0;
 
 extern rtems_libi2c_bus_t * const lpc24xx_i2c_1;
 
 extern rtems_libi2c_bus_t * const lpc24xx_i2c_2;
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/io.h b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
index c40d29e631..ac107ff0fa 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/io.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
@@ -1,9 +1,9 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_io
  *
- * Input and output module.
+ * @brief Input and output module.
  */
 
 /*
@@ -30,6 +30,16 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @defgroup lpc24xx_io IO Support and Configuration
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Input and output module.
+ *
+ * @{
+ */
+
 #define LPC24XX_IO_PORT_COUNT 5U
 
 #define LPC24XX_IO_INDEX_MAX (LPC24XX_IO_PORT_COUNT * 32U)
@@ -64,7 +74,7 @@ typedef enum {
   LPC24XX_MODULE_UART,
   LPC24XX_MODULE_USB,
   LPC24XX_MODULE_WDT,
-  LPC24XX_MODULE_NUMBER
+  LPC24XX_MODULE_COUNT
 } lpc24xx_module;
 
 typedef enum {
@@ -159,6 +169,8 @@ static inline bool lpc24xx_gpio_get( unsigned index)
   }
 }
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
index dfc86c5946..d1cb6b5b7e 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
@@ -66,8 +66,8 @@
 #define LPC24XX_IRQ_I2C_2 30
 #define LPC24XX_IRQ_I2S 31
 
-#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
-#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0U
+#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15U
 
 /**
  * @brief Minimum vector number.
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
index 33f03048a2..98a6156cbd 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_regs
  *
  * @brief Register definitions.
  */
@@ -25,6 +25,16 @@
 
 #include <bsp/utility.h>
 
+/**
+ * @defgroup lpc24xx_regs Register Definitions
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Register definitions.
+ *
+ * @{
+ */
+
 /* Vectored Interrupt Controller (VIC) */
 #define VIC_BASE_ADDR	0xFFFFF000
 #define VICIRQStatus   (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x000))
@@ -458,6 +468,7 @@ Reset, and Code Security/Debugging */
 #define EMC_DYN_RASCAS3  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x184))
 
 /* static RAM access registers */
+#define EMC_STA_BASE_0    ((uint32_t *) (EMC_BASE_ADDR + 0x200))
 #define EMC_STA_CFG0      (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x200))
 #define EMC_STA_WAITWEN0  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x204))
 #define EMC_STA_WAITOEN0  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x208))
@@ -466,6 +477,7 @@ Reset, and Code Security/Debugging */
 #define EMC_STA_WAITWR0   (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x214))
 #define EMC_STA_WAITTURN0 (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x218))
 
+#define EMC_STA_BASE_1    ((uint32_t *) (EMC_BASE_ADDR + 0x220))
 #define EMC_STA_CFG1      (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x220))
 #define EMC_STA_WAITWEN1  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x224))
 #define EMC_STA_WAITOEN1  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x228))
@@ -474,6 +486,7 @@ Reset, and Code Security/Debugging */
 #define EMC_STA_WAITWR1   (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x234))
 #define EMC_STA_WAITTURN1 (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x238))
 
+#define EMC_STA_BASE_2    ((uint32_t *) (EMC_BASE_ADDR + 0x240))
 #define EMC_STA_CFG2      (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x240))
 #define EMC_STA_WAITWEN2  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x244))
 #define EMC_STA_WAITOEN2  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x248))
@@ -482,6 +495,7 @@ Reset, and Code Security/Debugging */
 #define EMC_STA_WAITWR2   (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x254))
 #define EMC_STA_WAITTURN2 (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x258))
 
+#define EMC_STA_BASE_3    ((uint32_t *) (EMC_BASE_ADDR + 0x260))
 #define EMC_STA_CFG3      (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x260))
 #define EMC_STA_WAITWEN3  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x264))
 #define EMC_STA_WAITOEN3  (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x268))
@@ -1646,6 +1660,10 @@ typedef struct {
   uint32_t dest;
   uint32_t lli;
   uint32_t ctrl;
+} lpc24xx_dma_descriptor;
+
+typedef struct {
+  lpc24xx_dma_descriptor desc;
   uint32_t cfg;
 } lpc24xx_dma_channel;
 
@@ -2087,6 +2105,16 @@ typedef struct {
 
 #define EMC_DYN_CTRL_CMD_NOP 0x00000180U
 
+typedef struct {
+  uint32_t cfg;
+  uint32_t waitwen;
+  uint32_t waitoen;
+  uint32_t waitrd;
+  uint32_t waitpage;
+  uint32_t waitwr;
+  uint32_t waitrun;
+} lpc24xx_emc_static;
+
 /* I2C */
 
 typedef struct {
@@ -2120,10 +2148,12 @@ typedef struct {
   uint32_t clr;
 } lpc24xx_fio;
 
-static volatile uint32_t * const LPC24XX_PINSEL = &PINSEL0;
+#define LPC24XX_PINSEL ((volatile uint32_t *) &PINSEL0)
+
+#define LPC24XX_PINMODE ((volatile uint32_t *) &PINMODE0)
 
-static volatile uint32_t * const LPC24XX_PINMODE = &PINMODE0;
+#define LPC24XX_FIO ((volatile lpc24xx_fio *) FIO_BASE_ADDR)
 
-static volatile lpc24xx_fio * const LPC24XX_FIO = (volatile lpc24xx_fio *) FIO_BASE_ADDR;
+/** @} */
 
 #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/ssp.h b/c/src/lib/libbsp/arm/lpc24xx/include/ssp.h
index 700bfae588..f6db968d80 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/ssp.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/ssp.h
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_libi2c
  *
  * @brief LibI2C bus driver for the Synchronous Serial Port (SSP).
  */
@@ -27,10 +27,18 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @ingroup lpc24xx_libi2c
+ *
+ * @{
+ */
+
 extern rtems_libi2c_bus_t * const lpc24xx_ssp_0;
 
 extern rtems_libi2c_bus_t * const lpc24xx_ssp_1;
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h b/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
index 8205b54dec..57f8dd9fa3 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
@@ -1,37 +1,86 @@
 /**
  * @file
  *
- * @ingroup lpc24xx
+ * @ingroup lpc24xx_clocks
  *
  * @brief System clocks.
  */
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
  * Obere Lagerstr. 30
  * D-82178 Puchheim
  * Germany
- * rtems@embedded-brains.de
+ * <rtems@embedded-brains.de>
  *
- * The license and distribution terms for this file may be found in the file
- * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
  */
 
 #ifndef LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
 #define LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
 
+#include <bsp/lpc24xx.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif /* __cplusplus */
 
-void lpc24xx_micro_seconds_delay( unsigned us);
+/**
+ * @defgroup lpc24xx_clock System Clocks
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief System clocks.
+ *
+ * @{
+ */
 
-unsigned lpc24xx_pllclk( void);
+/**
+ * @brief Initializes the standard timer.
+ *
+ * This function uses Timer 1.
+ */
+void lpc24xx_timer_initialize(void);
 
-unsigned lpc24xx_cclk( void);
+/**
+ * @brief Returns current standard timer value in CPU clocks.
+ *
+ * This function uses Timer 1.
+ */
+static inline unsigned lpc24xx_timer(void)
+{
+  return T1TC;
+}
+
+/**
+ * @brief Delay for @a us micro seconds.
+ *
+ * This function uses the standard timer and assumes that the CPU frequency is
+ * in whole MHz numbers.  The delay value @a us will be converted to CPU ticks
+ * and there is no protection against integer overflows.
+ *
+ * This function uses Timer 1.
+ */
+void lpc24xx_micro_seconds_delay(unsigned us);
+
+/**
+ * @brief Returns the PLL output clock frequency in [Hz].
+ *
+ * Returns zero in case of an unexpected PLL input frequency.
+ */
+unsigned lpc24xx_pllclk(void);
+
+/**
+ * @brief Returns the CPU clock frequency in [Hz].
+ *
+ * Returns zero in case of an unexpected PLL input frequency.
+ */
+unsigned lpc24xx_cclk(void);
 
-void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cclksel);
+/** @} */
 
 #ifdef __cplusplus
 }