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authorSebastian Huber <sebastian.huber@embedded-brains.de>2017-12-08 07:32:10 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-12-08 09:30:34 +0100
commite9d61145e17c1eaee36a82593754133d51072e0c (patch)
tree58705eb291637e6125d7dd384fc62ae68705c98b /c/src/lib/libbsp/arm/gumstix
parentbsps: Do not install <libcpu/cache.h> (diff)
downloadrtems-e9d61145e17c1eaee36a82593754133d51072e0c.tar.bz2
bsp/gumstix: Move libcpu files to BSP
Update #3254.
Diffstat (limited to 'c/src/lib/libbsp/arm/gumstix')
-rw-r--r--c/src/lib/libbsp/arm/gumstix/Makefile.am13
-rw-r--r--c/src/lib/libbsp/arm/gumstix/clock/clock.c118
-rw-r--r--c/src/lib/libbsp/arm/gumstix/console/ffuart.c227
-rw-r--r--c/src/lib/libbsp/arm/gumstix/include/bsp/irq.h29
-rw-r--r--c/src/lib/libbsp/arm/gumstix/include/ffuart.h48
-rw-r--r--c/src/lib/libbsp/arm/gumstix/include/pxa255.h128
-rw-r--r--c/src/lib/libbsp/arm/gumstix/irq/irq.c51
-rw-r--r--c/src/lib/libbsp/arm/gumstix/make/custom/gumstix.cfg2
-rw-r--r--c/src/lib/libbsp/arm/gumstix/preinstall.am12
-rw-r--r--c/src/lib/libbsp/arm/gumstix/timer/timer.c75
10 files changed, 697 insertions, 6 deletions
diff --git a/c/src/lib/libbsp/arm/gumstix/Makefile.am b/c/src/lib/libbsp/arm/gumstix/Makefile.am
index 42104577ad..c12dbf4b2c 100644
--- a/c/src/lib/libbsp/arm/gumstix/Makefile.am
+++ b/c/src/lib/libbsp/arm/gumstix/Makefile.am
@@ -9,6 +9,8 @@ dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
+include_HEADERS += include/pxa255.h
+include_HEADERS += include/ffuart.h
include_bsp_HEADERS =
@@ -35,20 +37,25 @@ libbsp_a_SOURCES += \
../../shared/bspclean.c startup/bspstart.c startup/bspreset.c startup/memmap.c
libbsp_a_SOURCES += ../../shared/cpucounterread.c
libbsp_a_SOURCES += ../../shared/cpucounterdiff.c
+libbsp_a_SOURCES += clock/clock.c
+libbsp_a_SOURCES += timer/timer.c
#console
libbsp_a_SOURCES += console/uarts.c ../../shared/console.c \
../../shared/console_select.c ../../shared/console_control.c \
../../shared/console_read.c ../../shared/console_write.c
+libbsp_a_SOURCES += console/ffuart.c
# IRQ
include_bsp_HEADERS += ../../shared/include/irq-generic.h \
../../shared/include/irq-info.h
+include_bsp_HEADERS += include/bsp/irq.h
libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
libbsp_a_SOURCES += ../../shared/src/irq-generic.c
libbsp_a_SOURCES += ../../shared/src/irq-info.c
libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
libbsp_a_SOURCES += ../../shared/src/irq-server.c
libbsp_a_SOURCES += ../../shared/src/irq-shell.c
+libbsp_a_SOURCES += irq/irq.c
# Cache
libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
@@ -67,11 +74,7 @@ rtl8019_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
endif
-libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel \
- ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/clock.rel \
- ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/timer.rel \
- ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/ffuart.rel \
- ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/irq.rel
+libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel
if ON_SKYEYE
if HAS_NETWORKING
diff --git a/c/src/lib/libbsp/arm/gumstix/clock/clock.c b/c/src/lib/libbsp/arm/gumstix/clock/clock.c
new file mode 100644
index 0000000000..d8e8afb9dd
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/clock/clock.c
@@ -0,0 +1,118 @@
+/*
+ * PXA255 clock specific using the System Timer
+ *
+ * RTEMS uses IRQ 26 as Clock Source
+ */
+
+/*
+ * By Yang Xi <hiyangxi@gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/clockdrv.h>
+#include <rtems/libio.h>
+
+#include <stdlib.h>
+#include <bsp.h>
+#include <bspopts.h>
+#include <bsp/irq.h>
+#include <pxa255.h>
+
+#if ON_SKYEYE==1
+ #define CLOCK_DRIVER_USE_FAST_IDLE 1
+#endif
+
+static unsigned long period_num;
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+ /*Clear the interrupt bit */
+ XSCALE_OS_TIMER_TSR = 0x1;
+
+ /* enable timer interrupt */
+ XSCALE_OS_TIMER_IER |= 0x1;
+
+#if ON_SKYEYE==1
+ period_num = (TIMER_RATE* rtems_configuration_get_microseconds_per_tick())/100000;
+#else
+ period_num = (TIMER_RATE* rtems_configuration_get_microseconds_per_tick())/10000;
+#endif
+
+ XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num;
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+ /*Clear the interrupt bit */
+ XSCALE_OS_TIMER_TSR = 0x1;
+ /* disable timer interrupt*/
+ XSCALE_OS_TIMER_IER &= ~0x1;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+ /* check timer interrupt */
+ return XSCALE_OS_TIMER_IER & 0x1;
+}
+
+void Clock_isr(rtems_irq_hdl_param arg);
+
+rtems_irq_connect_data clock_isr_data = {
+ .name = XSCALE_IRQ_OS_TIMER,
+ .hdl = Clock_isr,
+ .handle = NULL,
+ .on = clock_isr_on,
+ .off = clock_isr_off,
+ .isOn = clock_isr_is_on,
+};
+
+#define Clock_driver_support_install_isr( _new ) \
+ BSP_install_rtems_irq_handler(&clock_isr_data)
+
+static void Clock_driver_support_initialize_hardware(void)
+{
+ period_num = TIMER_RATE* rtems_configuration_get_microseconds_per_tick();
+#if ON_SKYEYE==1
+ period_num /= 100000;
+#else
+ period_num /= 10000;
+#endif
+}
+
+#define Clock_driver_support_at_tick() \
+ do { \
+ /* read the status to clear the int */ \
+ XSCALE_OS_TIMER_TSR = 0x1; \
+ \
+ /*Add the match register*/ \
+ XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num; \
+ } while (0)
+
+#define Clock_driver_support_shutdown_hardware() \
+ do { \
+ BSP_remove_rtems_irq_handler(&clock_isr_data); \
+ } while (0)
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+#include "../../../../libbsp/shared/clockdrv_shell.h"
diff --git a/c/src/lib/libbsp/arm/gumstix/console/ffuart.c b/c/src/lib/libbsp/arm/gumstix/console/ffuart.c
new file mode 100644
index 0000000000..335fc6f4de
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/console/ffuart.c
@@ -0,0 +1,227 @@
+/*
+ * Console driver for pxa255 full function port by Yang Xi <hiyangxi@gmail.com>
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <termios.h>
+
+#include <pxa255.h>
+#include <ffuart.h>
+#include <rtems/bspIo.h>
+#include <libchip/serial.h>
+#include <libchip/sersupp.h>
+
+volatile int dbg_dly;
+
+/* static function prototypes */
+static int ffuart_first_open(int major, int minor, void *arg);
+static int ffuart_last_close(int major, int minor, void *arg);
+static int ffuart_read(int minor);
+static ssize_t ffuart_write(int minor, const char *buf, size_t len);
+static void ffuart_init(int minor);
+static void ffuart_write_polled(int minor, char c);
+static int ffuart_set_attributes(int minor, const struct termios *t);
+
+/* Pointers to functions for handling the UART. */
+const console_fns ffuart_fns =
+{
+ libchip_serial_default_probe,
+ ffuart_first_open,
+ ffuart_last_close,
+ ffuart_read,
+ ffuart_write,
+ ffuart_init,
+ ffuart_write_polled, /* not used in this driver */
+ ffuart_set_attributes,
+ FALSE /* TRUE if interrupt driven, FALSE if not. */
+};
+
+
+/*
+ * This is called the first time each device is opened. Since
+ * the driver is polled, we don't have to do anything. If the driver
+ * were interrupt driven, we'd enable interrupts here.
+ */
+static int ffuart_first_open(int major, int minor, void *arg)
+{
+ return 0;
+}
+
+
+/*
+ * This is called the last time each device is closed. Since
+ * the driver is polled, we don't have to do anything. If the driver
+ * were interrupt driven, we'd disable interrupts here.
+ */
+static int ffuart_last_close(int major, int minor, void *arg)
+{
+ return 0;
+}
+
+
+/*
+ * Read one character from UART.
+ *
+ * return -1 if there's no data, otherwise return
+ * the character in lowest 8 bits of returned int.
+ */
+static int ffuart_read(int minor)
+{
+ char c;
+ console_tbl *console_entry;
+ ffuart_reg_t *ffuart;
+
+ console_entry = BSP_get_uart_from_minor(minor);
+
+ if (console_entry == NULL) {
+ return -1;
+ }
+
+ ffuart = (ffuart_reg_t *)console_entry->ulCtrlPort1;
+
+ if (!(ffuart->lsr & FULL_RECEIVE)) {
+ return -1;
+ }
+
+ c = ffuart->rbr & 0xff;
+
+ return c;
+}
+
+
+/*
+ * Write buffer to UART
+ *
+ * return 1 on success, -1 on error
+ */
+static ssize_t ffuart_write(int minor, const char *buf, size_t len)
+{
+ size_t i, x;
+ char c;
+ console_tbl *console_entry;
+ ffuart_reg_t *ffuart;
+
+ console_entry = BSP_get_uart_from_minor(minor);
+
+ if (console_entry == NULL) {
+ return -1;
+ }
+
+ ffuart = (ffuart_reg_t *)console_entry->ulCtrlPort1;
+
+ for (i = 0; i < len; i++) {
+
+ while(1) {
+ if (ffuart->lsr & SEND_EMPTY) {
+ break;
+ }
+ }
+
+ c = (char) buf[i];
+#if ON_SKYEYE != 1
+ if(c=='\n'){
+ ffuart->rbr = '\r';
+ for (x = 0; x < 100; x++) {
+ dbg_dly++; /* using a global so this doesn't get optimized out */
+ }
+ while(1){
+ if(ffuart->lsr & SEND_EMPTY){
+ break;
+ }
+ }
+ }
+#endif
+ ffuart->rbr = c;
+
+ /* the TXRDY flag does not seem to update right away (is this true?) */
+ /* so we wait a bit before continuing */
+ for (x = 0; x < 100; x++) {
+ dbg_dly++; /* using a global so this doesn't get optimized out */
+ }
+ }
+
+ return 1;
+}
+
+
+static void ffuart_init(int minor)
+{
+
+
+ console_tbl *console_entry;
+ ffuart_reg_t *ffuart;
+ unsigned int divisor;
+
+ console_entry = BSP_get_uart_from_minor(minor);
+
+
+
+ if (console_entry == NULL) {
+ return;
+ }
+
+ ffuart = (ffuart_reg_t *)console_entry->ulCtrlPort1;
+ ffuart->lcr |= DLAB;
+ /*Set the Bound*/
+ ffuart->lcr |= DLAB;
+ divisor = FREQUENCY_UART / (115200*16);
+ ffuart->rbr = divisor & 0xff;
+ ffuart->ier = (divisor >> 8)&0xff;
+ /*Disable FIFO*/
+ ffuart->iir = 0;
+ ffuart->lcr &=~DLAB;
+ /*Enable UART*/
+ ffuart->ier = 0x40;
+ ffuart->lcr = EIGHT_BITS_NOPARITY_1STOPBIT;
+
+}
+
+/* I'm not sure this is needed for the shared console driver. */
+static void ffuart_write_polled(int minor, char c)
+{
+ ffuart_write(minor, &c, 1);
+}
+
+/* This is for setting baud rate, bits, etc. */
+static int ffuart_set_attributes(int minor, const struct termios *t)
+{
+ return 0;
+}
+
+/***********************************************************************/
+/*
+ * The following functions are not used by TERMIOS, but other RTEMS
+ * functions use them instead.
+ */
+/***********************************************************************/
+/*
+ * Read from UART. This is used in the exit code, and can't
+ * rely on interrupts.
+ */
+static int ffuart_poll_read(int minor)
+{
+ return ffuart_read(minor);
+}
+
+
+/*
+ * Write a character to the console. This is used by printk() and
+ * maybe other low level functions. It should not use interrupts or any
+ * RTEMS system calls. It needs to be very simple
+ */
+static void _BSP_put_char( char c ) {
+ ffuart_write_polled(0, c);
+}
+
+static int _BSP_poll_char(void) {
+ return ffuart_poll_read(0);
+}
+
+BSP_output_char_function_type BSP_output_char = _BSP_put_char;
+BSP_polling_getchar_function_type BSP_poll_char = _BSP_poll_char;
diff --git a/c/src/lib/libbsp/arm/gumstix/include/bsp/irq.h b/c/src/lib/libbsp/arm/gumstix/include/bsp/irq.h
new file mode 100644
index 0000000000..a8b5d24da1
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/include/bsp/irq.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2010 embedded brains GmbH.
+ *
+ * Interrupt handler Header file for PXA By Yang Xi <hiyangxi@gmail.com>
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef __IRQ_H__
+#define __IRQ_H__
+
+#ifndef __asm__
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+#include <pxa255.h>
+
+#define BSP_INTERRUPT_VECTOR_MIN 0
+
+#define BSP_INTERRUPT_VECTOR_MAX (PRIMARY_IRQS - 1)
+
+#endif /* __asm__ */
+
+#endif /* __IRQ_H__ */
diff --git a/c/src/lib/libbsp/arm/gumstix/include/ffuart.h b/c/src/lib/libbsp/arm/gumstix/include/ffuart.h
new file mode 100644
index 0000000000..68df822183
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/include/ffuart.h
@@ -0,0 +1,48 @@
+/*
+ * FFUART for PXA250 CPU by Yang Xi<hiyangxi@gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef __FFUART_H__
+#define __FFUART_H__
+
+typedef struct {
+ /*
+ *Receive buffer(DLAB=0).Transmit buffer(DLAB=0).
+ *Divisor Latch Low(DLAB=1)
+ */
+ volatile unsigned int rbr;
+ /*Interrupt enable(DLAB=0). Divisor Latch High(DLAB=1)*/
+ volatile unsigned int ier;
+ /*Interrupt identification.FIFO control*/
+ volatile unsigned int iir;
+ /*Line Control*/
+ volatile unsigned int lcr;
+ /*Modem control*/
+ volatile unsigned int mcr;
+ /*Line Status*/
+ volatile unsigned int lsr;
+ /*Modem status*/
+ volatile unsigned int msr;
+ /*Scratch Pad*/
+ volatile unsigned int spr;
+ /*Infrared Selection*/
+ volatile unsigned int isr;
+} ffuart_reg_t;
+
+
+#define EIGHT_BITS_NOPARITY_1STOPBIT 0x3
+#define DLAB 0x80
+
+
+/*Divisor = frequency_uart/(16 * BaudRate*)*/
+#define FREQUENCY_UART (14745600)
+
+#define SEND_EMPTY 0x20
+#define FULL_RECEIVE 0x01
+
+#endif
+
diff --git a/c/src/lib/libbsp/arm/gumstix/include/pxa255.h b/c/src/lib/libbsp/arm/gumstix/include/pxa255.h
new file mode 100644
index 0000000000..d5f2830c53
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/include/pxa255.h
@@ -0,0 +1,128 @@
+/*
+ * By Yang Xi <hiyangxi@gmail.com>.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef __PXA_255_H__
+#define __PXA_255_H__
+
+typedef unsigned int word_t;
+
+/*Interrupt*/
+
+#define PRIMARY_IRQS 32
+#define GPIO_IRQS (85 - 2) /* The first two IRQs have level
+ one interrupts */
+#define GPIO_IRQ 10
+
+#define IRQS (PRIMARY_IRQS + GPIO_IRQS)
+
+/* Interrupt Controller */
+#define INTERRUPT_OFFSET 0xd00000
+#define XSCALE_IRQ_OS_TIMER 26
+#define XSCALE_IRQ_PMU 12
+#define XSCALE_IRQ_STUART 20
+#define XSCALE_IRQ_NETWORK 16
+
+#define PMU_IRQ 12
+#define CCNT_IRQ_ENABLE 1UL << 6
+#define PMN1_IRQ_ENABLE 1UL << 5
+#define PMN0_IRQ_ENABLE 1UL << 4
+
+#define IODEVICE_VADDR 0x40000000
+#define XSCALE_INT (IODEVICE_VADDR + INTERRUPT_OFFSET)
+
+#define XSCALE_INT_ICMR (*(volatile word_t *)(XSCALE_INT + 0x04)) /* Mask register */
+#define XSCALE_INT_ICLR (*(volatile word_t *)(XSCALE_INT + 0x08)) /* FIQ / IRQ selection */
+#define XSCALE_INT_ICCR (*(volatile word_t *)(XSCALE_INT + 0x14)) /* Control register */
+#define XSCALE_INT_ICIP (*(volatile word_t *)(XSCALE_INT + 0x00)) /* IRQ pending */
+#define XSCALE_INT_ICFP (*(volatile word_t *)(XSCALE_INT + 0x0c)) /* FIQ pending */
+#define XSCALE_INT_ICPR (*(volatile word_t *)(XSCALE_INT + 0x10)) /* Pending (unmasked) */
+
+/* GPIO */
+#define GPIO_OFFSET 0xe00000
+#define PXA_GPIO (IODEVICE_VADDR + GPIO_OFFSET)
+
+#define PXA_GEDR0 (*(volatile word_t *)(PXA_GPIO + 0x48)) /* GPIO edge detect 0 */
+#define PXA_GEDR1 (*(volatile word_t *)(PXA_GPIO + 0x4C)) /* GPIO edge detect 1 */
+#define PXA_GEDR2 (*(volatile word_t *)(PXA_GPIO + 0x50)) /* GPIO edge detect 2 */
+
+
+/* PXA2XX Timer */
+
+#define TIMER_OFFSET 0x0a00000
+#define CLOCKS_OFFSET 0x1300000
+/*I change the TIMER_RATE to 36864,because when I use 3686400, the period will be calculate
+ to 30000*/
+#define TIMER_RATE 36864
+
+#define XSCALE_TIMERS (IODEVICE_VADDR + TIMER_OFFSET)
+
+/* Match registers */
+#define XSCALE_OS_TIMER_MR0 (*(volatile word_t *)(XSCALE_TIMERS + 0x00))
+#define XSCALE_OS_TIMER_MR1 (*(volatile word_t *)(XSCALE_TIMERS + 0x04))
+#define XSCALE_OS_TIMER_MR2 (*(volatile word_t *)(XSCALE_TIMERS + 0x08))
+#define XSCALE_OS_TIMER_MR3 (*(volatile word_t *)(XSCALE_TIMERS + 0x0c))
+
+/* Interrupt enable register */
+#define XSCALE_OS_TIMER_IER (*(volatile word_t *)(XSCALE_TIMERS + 0x1c))
+/* Watchdog match enable register */
+#define XSCALE_OS_TIMER_WMER (*(volatile word_t *)(XSCALE_TIMERS + 0x18))
+/* Timer count register */
+#define XSCALE_OS_TIMER_TCR (*(volatile word_t *)(XSCALE_TIMERS + 0x10))
+/* Timer status register */
+#define XSCALE_OS_TIMER_TSR (*(volatile word_t *)(XSCALE_TIMERS + 0x14))
+
+#define XSCALE_CLOCKS (IODEVICE_VADDR + CLOCKS_VOFFSET)
+
+#define XSCALE_CLOCKS_CCCR (*(volatile word_t *)(XSCALE_CLOCKS + 0x00))
+
+/*Use ffuart port as the console*/
+#define FFUART_BASE 0x40100000
+
+/*Write to SKYEYE_MAGIC_ADDRESS to make SKYEYE exit*/
+
+#define SKYEYE_MAGIC_ADDRESS (*(volatile word_t *)(0xb0000000))
+#define SKYEYE_MAGIC_NUMBER (0xf0f0f0f0)
+
+/*PMC*/
+#define PMC_PMNC 0
+#define PMC_CCNT 1
+#define PMC_INTEN 2
+#define PMC_FLAG 3
+#define PMC_EVTSEL 4
+#define PMC_PMN0 5
+#define PMC_PMN1 6
+#define PMC_PMN2 7
+#define PMC_PMN3 8
+
+#define PMC_PMNC_E (0x01)
+#define PMC_PMNC_PCR (0x01 << 1)
+#define PMC_PMNC_CCR (0x01 << 2)
+#define PMC_PMNC_CCD (0x01 << 3)
+#define PMC_PMNC_PCD (0x01 << 4)
+
+/*LCD*/
+#define LCCR0 (*(volatile word_t *)(0x44000000))
+#define LCCR1 (*(volatile word_t *)(0x44000004))
+#define LCCR2 (*(volatile word_t *)(0x44000008))
+#define LCCR3 (*(volatile word_t *)(0x4400000C))
+
+#define FDADR0 (*(volatile word_t *)(0x44000200))
+#define FSADR0 (*(volatile word_t *)(0x44000204))
+#define FIDR0 (*(volatile word_t *)(0x44000208))
+#define LDCMD0 (*(volatile word_t *)(0x4400020C))
+
+#define FDADR1 (*(volatile word_t *)(0x44000210))
+#define FSADR1 (*(volatile word_t *)(0x44000214))
+#define FIDR1 (*(volatile word_t *)(0x44000218))
+#define LDCMD1 (*(volatile word_t *)(0x4400021C))
+
+#define LCCR0_ENB 0x00000001
+#define LCCR1_PPL 0x000003FF
+#define LCCR2_LPP 0x000003FF
+#define LCCR3_BPP 0x07000000
+#endif
diff --git a/c/src/lib/libbsp/arm/gumstix/irq/irq.c b/c/src/lib/libbsp/arm/gumstix/irq/irq.c
new file mode 100644
index 0000000000..425795b165
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/irq/irq.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010 embedded brains GmbH.
+ *
+ * PXA255 Interrupt handler by Yang Xi <hiyangxi@gmail.com>
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/armv4.h>
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+
+#include <pxa255.h>
+
+void bsp_interrupt_dispatch(void)
+{
+ rtems_vector_number vector = 31 - __builtin_clz(XSCALE_INT_ICIP);
+
+ bsp_interrupt_handler_dispatch(vector);
+}
+
+void bsp_interrupt_vector_enable(rtems_vector_number vector)
+{
+ bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+ XSCALE_INT_ICMR |= 1 << vector;
+}
+
+void bsp_interrupt_vector_disable(rtems_vector_number vector)
+{
+ bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+ XSCALE_INT_ICMR &= ~(1 << vector);
+}
+
+rtems_status_code bsp_interrupt_facility_initialize(void)
+{
+ /* disable all interrupts */
+ XSCALE_INT_ICMR = 0x0;
+
+ /* Direct the interrupt to IRQ*/
+ XSCALE_INT_ICLR = 0x0;
+
+ /* Install the IRQ exception handler */
+ _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt, NULL);
+
+ return RTEMS_SUCCESSFUL;
+}
diff --git a/c/src/lib/libbsp/arm/gumstix/make/custom/gumstix.cfg b/c/src/lib/libbsp/arm/gumstix/make/custom/gumstix.cfg
index a8d9fd3647..d42b44695b 100644
--- a/c/src/lib/libbsp/arm/gumstix/make/custom/gumstix.cfg
+++ b/c/src/lib/libbsp/arm/gumstix/make/custom/gumstix.cfg
@@ -5,7 +5,7 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
-RTEMS_CPU_MODEL=pxa255
+RTEMS_CPU_MODEL=shared
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
diff --git a/c/src/lib/libbsp/arm/gumstix/preinstall.am b/c/src/lib/libbsp/arm/gumstix/preinstall.am
index 23dbe2a207..99477a8ded 100644
--- a/c/src/lib/libbsp/arm/gumstix/preinstall.am
+++ b/c/src/lib/libbsp/arm/gumstix/preinstall.am
@@ -45,6 +45,14 @@ $(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+$(PROJECT_INCLUDE)/pxa255.h: include/pxa255.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/pxa255.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/pxa255.h
+
+$(PROJECT_INCLUDE)/ffuart.h: include/ffuart.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/ffuart.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/ffuart.h
+
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
@@ -69,6 +77,10 @@ $(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INC
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
+$(PROJECT_INCLUDE)/bsp/irq.h: include/bsp/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
if ON_SKYEYE
endif
if ON_SKYEYE
diff --git a/c/src/lib/libbsp/arm/gumstix/timer/timer.c b/c/src/lib/libbsp/arm/gumstix/timer/timer.c
new file mode 100644
index 0000000000..7eb3d5b811
--- /dev/null
+++ b/c/src/lib/libbsp/arm/gumstix/timer/timer.c
@@ -0,0 +1,75 @@
+/**
+ * @file
+ * @brief PXA255 timer
+ */
+
+/*
+ * PXA255 timer by Yang Xi <hiyangxi@gmail.com>
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <rtems.h>
+#include <rtems/btimer.h>
+#include <pxa255.h>
+
+uint32_t tstart;
+static uint32_t tick_time;
+bool benchmark_timer_find_average_overhead;
+
+bool benchmark_timer_is_initialized = false;
+
+/*
+ * Use the timer count register to measure.
+ * The frequency of it is 3.4864MHZ
+ * The longest period we are able to capture is 4G/3.4864MHZ
+ */
+void benchmark_timer_initialize(void)
+{
+ tick_time = XSCALE_OS_TIMER_TCR;
+}
+
+/*
+ * The following controls the behavior of Read_timer().
+ *
+ * AVG_OVEREHAD is the overhead for starting and stopping the timer. It
+ * is usually deducted from the number returned.
+ *
+ * LEAST_VALID is the lowest number this routine should trust. Numbers
+ * below this are "noise" and zero is returned.
+ */
+
+#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
+ /* (Y countdowns) to start/stop the timer. */
+ /* This value is in microseconds. */
+#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
+
+benchmark_timer_t benchmark_timer_read(void)
+{
+
+ uint32_t total;
+ total = XSCALE_OS_TIMER_TCR;
+ if(total>=tick_time)
+ total -= tick_time;
+ else
+ total += 0xffffffff - tick_time; /*Round up but not overflow*/
+
+ if ( benchmark_timer_find_average_overhead == true )
+ return total; /*Counter cycles*/
+
+ if ( total < LEAST_VALID )
+ return 0; /* below timer resolution */
+
+ return total;
+}
+
+void benchmark_timer_disable_subtracting_average_overhead(
+ bool find_flag
+)
+{
+ benchmark_timer_find_average_overhead = find_flag;
+}