summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/arm/gp32
diff options
context:
space:
mode:
authorRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 14:53:02 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 14:53:02 +0000
commit32b8506b2409a01d434dd0ab5024c7718852ebcb (patch)
tree24b3215851217bf05c40cc8a62af4d021019b5d1 /c/src/lib/libbsp/arm/gp32
parentWhitespace removal. (diff)
downloadrtems-32b8506b2409a01d434dd0ab5024c7718852ebcb.tar.bz2
Whitespace removal.
Diffstat (limited to 'c/src/lib/libbsp/arm/gp32')
-rw-r--r--c/src/lib/libbsp/arm/gp32/console/uart.c48
-rw-r--r--c/src/lib/libbsp/arm/gp32/include/bsp.h4
-rw-r--r--c/src/lib/libbsp/arm/gp32/smc/smc.c78
-rw-r--r--c/src/lib/libbsp/arm/gp32/start/start.S38
-rw-r--r--c/src/lib/libbsp/arm/gp32/startup/bspreset.c2
-rw-r--r--c/src/lib/libbsp/arm/gp32/startup/bspstart.c6
6 files changed, 88 insertions, 88 deletions
diff --git a/c/src/lib/libbsp/arm/gp32/console/uart.c b/c/src/lib/libbsp/arm/gp32/console/uart.c
index b619a378c7..635bc1ca6b 100644
--- a/c/src/lib/libbsp/arm/gp32/console/uart.c
+++ b/c/src/lib/libbsp/arm/gp32/console/uart.c
@@ -1,10 +1,10 @@
/*
* console driver for S3C2400 UARTs
*
- * This driver uses the shared console driver in
+ * This driver uses the shared console driver in
* ...../libbsp/shared/console.c
*
- * If you want the driver to be interrupt driven, you
+ * If you want the driver to be interrupt driven, you
* need to write the ISR, and in the ISR insert the
* chars into termios's queue.
*
@@ -53,8 +53,8 @@ console_data Console_Port_Data[NUM_DEVS];
rtems_device_minor_number Console_Port_Minor = 0;
/* Pointers to functions for handling the UART. */
-console_fns uart_fns =
-{
+console_fns uart_fns =
+{
libchip_serial_default_probe,
uart_first_open,
uart_last_close,
@@ -66,7 +66,7 @@ console_fns uart_fns =
FALSE /* TRUE if interrupt driven, FALSE if not. */
};
-/*
+/*
* There's one item in array for each UART.
*
* Some of these fields are marked "NOT USED". They are not used
@@ -99,25 +99,25 @@ console_tbl Console_Port_Tbl[] = {
/* Functions called via termios callbacks (i.e. the ones in uart_fns */
/*********************************************************************/
-/*
- * This is called the first time each device is opened. If the driver
- * is interrupt driven, you should enable interrupts here. Otherwise,
+/*
+ * This is called the first time each device is opened. If the driver
+ * is interrupt driven, you should enable interrupts here. Otherwise,
* it's probably safe to do nothing.
*
* Since micromonitor already set up the UART, we do nothing.
*/
-static int uart_first_open(int major, int minor, void *arg)
+static int uart_first_open(int major, int minor, void *arg)
{
return 0;
}
-/*
- * This is called the last time each device is closed. If the driver
- * is interrupt driven, you should disable interrupts here. Otherwise,
+/*
+ * This is called the last time each device is closed. If the driver
+ * is interrupt driven, you should disable interrupts here. Otherwise,
* it's probably safe to do nothing.
*/
-static int uart_last_close(int major, int minor, void *arg)
+static int uart_last_close(int major, int minor, void *arg)
{
return 0;
}
@@ -129,7 +129,7 @@ static int uart_last_close(int major, int minor, void *arg)
* Return -1 if there's no data, otherwise return
* the character in lowest 8 bits of returned int.
*/
-static int uart_read(int minor)
+static int uart_read(int minor)
{
char c;
@@ -148,8 +148,8 @@ static int uart_read(int minor)
}
-/*
- * Write buffer to UART
+/*
+ * Write buffer to UART
*
* return 1 on success, -1 on error
*/
@@ -163,14 +163,14 @@ static int uart_write(int minor, const char *buf, int len)
while(!(rUTRSTAT0 & 0x2)) {
continue;
}
-
+
rUTXH0 = (char) buf[i];
}
} else {
printk("Unknown console minor number: %d\n", minor);
return -1;
}
-
+
return 1;
}
@@ -180,13 +180,13 @@ static void uart_init(int minor)
{
int i;
unsigned int reg = 0;
-
+
/* enable UART0 */
rCLKCON|=0x100;
/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
reg = get_PCLK() / (16 * 115200) - 1;
-
+
/* FIFO enable, Tx/Rx FIFO clear */
rUFCON0 = 0x07;
rUMCON0 = 0x0;
@@ -200,7 +200,7 @@ static void uart_init(int minor)
rUBRDIV0 = reg;
for (i = 0; i < 100; i++);
-
+
}
/* I'm not sure this is needed for the shared console driver. */
@@ -210,7 +210,7 @@ static void uart_write_polled(int minor, char c)
}
/* This is for setting baud rate, bits, etc. */
-static int uart_set_attributes(int minor, const struct termios *t)
+static int uart_set_attributes(int minor, const struct termios *t)
{
return 0;
}
@@ -221,7 +221,7 @@ static int uart_set_attributes(int minor, const struct termios *t)
* functions use them instead.
*/
/***********************************************************************/
-/*
+/*
* Read from UART. This is used in the exit code, and can't
* rely on interrupts.
*/
@@ -232,7 +232,7 @@ int uart_poll_read(int minor)
/*
- * Write a character to the console. This is used by printk() and
+ * Write a character to the console. This is used by printk() and
* maybe other low level functions. It should not use interrupts or any
* RTEMS system calls. It needs to be very simple
*/
diff --git a/c/src/lib/libbsp/arm/gp32/include/bsp.h b/c/src/lib/libbsp/arm/gp32/include/bsp.h
index f9b7eb1793..7866d01ebd 100644
--- a/c/src/lib/libbsp/arm/gp32/include/bsp.h
+++ b/c/src/lib/libbsp/arm/gp32/include/bsp.h
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
-| bsp.h - ARM BSP
+| bsp.h - ARM BSP
+--------------------------------------------------------------------------+
| This include file contains definitions related to the ARM BSP.
+--------------------------------------------------------------------------+
@@ -10,7 +10,7 @@
| The license and distribution terms for this file may be
| found in found in the file LICENSE in this distribution or at
| http://www.rtems.com/license/LICENSE.
-|
+|
| $Id$
+--------------------------------------------------------------------------*/
diff --git a/c/src/lib/libbsp/arm/gp32/smc/smc.c b/c/src/lib/libbsp/arm/gp32/smc/smc.c
index f204f7456c..118eaffc43 100644
--- a/c/src/lib/libbsp/arm/gp32/smc/smc.c
+++ b/c/src/lib/libbsp/arm/gp32/smc/smc.c
@@ -1,7 +1,7 @@
/* smc.c -- s3c2400 smc disk block device implementation
- Squidge's SMC Low-level access routines.
- Inspired and derived from routines provided by Samsung Electronics M/M R&D Center & FireFly.
+ Squidge's SMC Low-level access routines.
+ Inspired and derived from routines provided by Samsung Electronics M/M R&D Center & FireFly.
*/
@@ -96,7 +96,7 @@ static void sm_write( uint8_t data)
static uint8_t sm_read(void)
{
uint8_t data;
-
+
rPDDAT &= (~0x100);
data = rPBDAT & 0xFF;
rPDDAT |= 0x100;
@@ -135,7 +135,7 @@ static uint8_t sm_status()
void smc_read_id( uint8_t* buf, uint32_t length)
{
-
+
uint32_t i;
sm_chip_en();
@@ -163,8 +163,8 @@ void smc_read_id( uint8_t* buf, uint32_t length)
uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
{
uint32_t block, page, i;
-
- /* convert logical block to physical block
+
+ /* convert logical block to physical block
and then convert into page suitable for read1 command...
*/
block = lpage >> 5;
@@ -174,9 +174,9 @@ uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
}
else
return 0;
-
+
sm_chip_en();
-
+
sm_cle_en();
sm_write_en();
sm_write(READ1_CMD);
@@ -191,20 +191,20 @@ uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
if (smc_info.mb >= 64) sm_write( (uint8_t)(page >> 16));
sm_write_dis();
sm_ale_dis();
-
+
sm_busy();
-
+
sm_read_en();
for (i = 0; i < 512; i++)
- {
+ {
*buf = sm_read();
buf++;
}
sm_read_dis();
sm_chip_dis();
-
+
sm_busy();
- return 1;
+ return 1;
}
void smc_read_spare( uint32_t page, uint8_t* buf, uint8_t length)
@@ -257,7 +257,7 @@ void smc_make_l2p(void)
{
/* read physical block - first page */
smc_read_spare( pblock*smc_info.pages_per_block, (uint8_t*)&data, 16);
-
+
zone = pblock >> 10; /* divide by 1024 to get zone */
if ((data[5] == 0xFF) && ((data[6]&0xF8) == 0x10))
{
@@ -282,7 +282,7 @@ void smc_make_l2p(void)
{
smc_p2l[pblock] = BLOCK_RESERVED;
cnt3++;
- }
+ }
}
}
}
@@ -327,7 +327,7 @@ void smc_init( void)
{
unsigned char buf[32];
int i;
-
+
/* reset smc */
sm_chip_en();
sm_cle_en();
@@ -335,16 +335,16 @@ void smc_init( void)
sm_write(0xFF);
sm_write_dis();
sm_cle_dis();
- for(i=0;i<10;i++);
+ for(i=0;i<10;i++);
sm_busy();
sm_chip_dis();
-
+
smc_read_id (buf, 4);
smc_detect (buf[0], buf[1], buf[2]);
printk ("SMC: [%02X-%02X-%02X-%02X]\n", buf[0], buf[1], buf[2], buf[3]);
printk ("SMC size: %dMB detected\n",smc_info.mb);
smc_make_l2p();
-}
+}
/**********
* Function: sm_ECCEncode (completely ripped, unaltered, from the samsung routines)
@@ -352,7 +352,7 @@ void smc_init( void)
* - adopted from "ECC Algorithm for SmartMedia V3.0"
* by Memory Product & Technology, Samsung Electronics Co. (ecc30.pdf)
**********/
-int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
+int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
{
uint32_t i, j;
uint8_t paritr[256], tmp = 0, tmp2 = 0;
@@ -368,13 +368,13 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
uint8_t* paritr_ptr;
paritr_ptr = paritr;
- for (i = 0; i < 256; ++i, ++paritr_ptr, ++p_buf)
+ for (i = 0; i < 256; ++i, ++paritr_ptr, ++p_buf)
{
paritc ^= *p_buf;
tmp = (*p_buf & 0xf0) >> 4;
tmp2 = *p_buf & 0x0f;
- switch (tmp)
+ switch (tmp)
{
case 0:
case 3:
@@ -416,79 +416,79 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
parit4_1 = parit7c ^ parit6c ^ parit5c ^ parit4c;
paritr_ptr = paritr;
- for (i = 0; i < 256; ++i, ++paritr_ptr)
+ for (i = 0; i < 256; ++i, ++paritr_ptr)
{
sum ^= *paritr_ptr;
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 2, paritr_ptr += 2)
+ for (i = 0; i < 256; i += 2, paritr_ptr += 2)
{
parit8_2 ^= *paritr_ptr;
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 4, paritr_ptr += 4)
+ for (i = 0; i < 256; i += 4, paritr_ptr += 4)
{
parit16_2 ^= *paritr_ptr;
parit16_2 ^= *(paritr_ptr + 1);
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 8, paritr_ptr += 8)
+ for (i = 0; i < 256; i += 8, paritr_ptr += 8)
{
- for (j = 0; j <= 3; ++j)
+ for (j = 0; j <= 3; ++j)
{
parit32_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 16, paritr_ptr += 16)
+ for (i = 0; i < 256; i += 16, paritr_ptr += 16)
{
- for (j = 0; j <= 7; ++j)
+ for (j = 0; j <= 7; ++j)
{
parit64_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 32, paritr_ptr += 32)
+ for (i = 0; i < 256; i += 32, paritr_ptr += 32)
{
- for (j = 0; j <= 15; ++j)
+ for (j = 0; j <= 15; ++j)
{
parit128_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 64, paritr_ptr += 64)
+ for (i = 0; i < 256; i += 64, paritr_ptr += 64)
{
- for (j = 0; j <= 31; ++j)
+ for (j = 0; j <= 31; ++j)
{
parit256_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 128, paritr_ptr += 128)
+ for (i = 0; i < 256; i += 128, paritr_ptr += 128)
{
- for (j = 0; j <= 63; ++j)
+ for (j = 0; j <= 63; ++j)
{
parit512_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
- for (i = 0; i < 256; i += 256, paritr_ptr += 256)
+ for (i = 0; i < 256; i += 256, paritr_ptr += 256)
{
- for (j = 0; j <= 127; ++j)
+ for (j = 0; j <= 127; ++j)
{
parit1024_2 ^= *(paritr_ptr + j);
}
}
- if (sum==0)
+ if (sum==0)
{
parit1024_1 = parit1024_2;
parit512_1 = parit512_2;
@@ -499,7 +499,7 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
parit16_1 = parit16_2;
parit8_1 = parit8_2;
}
- else
+ else
{
parit1024_1 = parit1024_2 ? 0 : 1;
parit512_1 = parit512_2 ? 0 : 1;
diff --git a/c/src/lib/libbsp/arm/gp32/start/start.S b/c/src/lib/libbsp/arm/gp32/start/start.S
index b7faf5eb23..e3be252332 100644
--- a/c/src/lib/libbsp/arm/gp32/start/start.S
+++ b/c/src/lib/libbsp/arm/gp32/start/start.S
@@ -1,7 +1,7 @@
/*
* GP32 startup code
*
- *
+ *
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -15,7 +15,7 @@
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
-
+
/* Some standard definitions...*/
.equ PSR_MODE_USR, 0x10
.equ PSR_MODE_FIQ, 0x11
@@ -68,16 +68,16 @@ _start:
_start2:
@---------------------------------------------------------------------------------
- /*
+ /*
* Since I don't plan to return to the bootloader,
* I don't have to save the registers.
*
- * I'll just set the CPSR for SVC mode, interrupts
+ * I'll just set the CPSR for SVC mode, interrupts
* off, and ARM instructions.
*/
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
-
+
/* --- Initialize stack pointer registers */
/* Enter IRQ mode and set up the IRQ stack pointer */
mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */
@@ -99,7 +99,7 @@ _start2:
ldr r1, =_abt_stack_size
ldr sp, =_abt_stack
add sp, sp, r1
-
+
/* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
@@ -107,7 +107,7 @@ _start2:
ldr sp, =_svc_stack
add sp, sp, r1
sub sp, sp, #0x64
-
+
/* disable mmu, I and D caches*/
nop
@@ -124,7 +124,7 @@ _start2:
mov r1,#0x00
Loop1:
mov r2,#0x00
-Loop2:
+Loop2:
mov r3, r2, lsl#26
orr r3, r3, r1, lsl#5
mcr p15, 0, r3, c7, c14, 2
@@ -134,19 +134,19 @@ Loop2:
add r1, r1, #0x01
cmp r1, #8
bne Loop1
-
- /*
+
+ /*
* Initialize the MMU. After we return, the MMU is enabled,
* and memory may be remapped. I hope we don't remap this
* memory away.
*/
ldr r0, =mem_map
- bl mmu_init
+ bl mmu_init
- /*
+ /*
* Initialize the exception vectors. This includes the
- * exceptions vectors (0x00000000-0x0000001c), and the
+ * exceptions vectors (0x00000000-0x0000001c), and the
* pointers to the exception handlers (0x00000020-0x0000003c).
*/
mov r0, #0
@@ -155,11 +155,11 @@ Loop2:
stmia r0!, {r2-r9}
ldmia r1!, {r2-r9}
stmia r0!, {r2-r9}
-
+
/* Now we are prepared to start the BSP's C code */
bl boot_card
- /*
+ /*
* Theoretically, we could return to what started us up,
* but we'd have to have saved the registers and stacks.
* Instead, we'll just reset.
@@ -169,13 +169,13 @@ Loop2:
/* We shouldn't get here. If we do, hang */
_hang: b _hang
-
-/*
+
+/*
* This is the exception vector table and the pointers to
* the functions that handle the exceptions. It's a total
* of 16 words (64 bytes)
*/
-vector_block:
+vector_block:
ldr pc, Reset_Handler
ldr pc, Undefined_Handler
ldr pc, SWI_Handler
@@ -187,7 +187,7 @@ vector_block:
Reset_Handler: b bsp_reset
Undefined_Handler: b Undefined_Handler
-SWI_Handler: b SWI_Handler
+SWI_Handler: b SWI_Handler
Prefetch_Handler: b Prefetch_Handler
Abort_Handler: b Abort_Handler
nop
diff --git a/c/src/lib/libbsp/arm/gp32/startup/bspreset.c b/c/src/lib/libbsp/arm/gp32/startup/bspreset.c
index 9484a62bdc..15586749cb 100644
--- a/c/src/lib/libbsp/arm/gp32/startup/bspreset.c
+++ b/c/src/lib/libbsp/arm/gp32/startup/bspreset.c
@@ -4,7 +4,7 @@
* http://www.rtems.com/license/LICENSE.
*
* $Id$
- */
+ */
#include <bsp.h>
diff --git a/c/src/lib/libbsp/arm/gp32/startup/bspstart.c b/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
index 669ea9c05f..be211505bd 100644
--- a/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
@@ -1,7 +1,7 @@
/*
* This file contains the ARM BSP startup package. It includes application,
* board, and monitor specific initialization and configuration. The generic CPU
- * dependent initialization has been performed before this routine is invoked.
+ * dependent initialization has been performed before this routine is invoked.
*
*
* Copyright (c) 2000 Canon Research Centre France SA.
@@ -12,7 +12,7 @@
* http://www.rtems.com/license/LICENSE.
*
* $Id$
- */
+ */
#include <bsp.h>
#include <rtems/bspIo.h>
@@ -32,7 +32,7 @@ Thread bsp_idle_task(uint32_t ignored)
asm volatile ("MCR p15,0,r0,c7,c0,4 \n");
}
}
-
+
/*
* BSP Specific Initialization in C
*/