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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-07-06 18:46:04 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-07-06 18:46:04 +0000 |
commit | 3c7ed6b8cd505f696c9c2b6d90723094f334b348 (patch) | |
tree | 30da596d32865c2d042ece5735d16baeade7d17d /c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h | |
parent | Add PR. (diff) | |
download | rtems-3c7ed6b8cd505f696c9c2b6d90723094f334b348.tar.bz2 |
2005-07-06 Markku Puro <markku.puro@kopteri.net>
* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
clock/clockdrv.c, console/conio.c, console/console.c,
console/defaultfont.c, include/arm_mode_bits.h, include/asm_macros.h,
include/bsp.h, include/bspopts.h.in, include/conio.h, include/gba.h,
include/gba_registers.h, include/tm27.h, irq/bsp_irq_asm.S,
irq/bsp_irq_init.c, irq/irq.c, irq/irq.h, irq/irq_asm.S,
irq/irq_init.c, start/logo.S, start/start.S, startup/bspstart.c,
startup/cpu.c, startup/cpu_asm.S, startup/exit.c, startup/linkcmds,
timer/timer.c: New files.
Diffstat (limited to 'c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h')
-rw-r--r-- | c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h b/c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h new file mode 100644 index 0000000000..c8c636f29e --- /dev/null +++ b/c/src/lib/libbsp/arm/gba/include/arm_mode_bits.h @@ -0,0 +1,47 @@ +/** + * @file arm_mode_bits.h + * + * ARM statusregister mode bits. + * + * This include file contains definitions related to the ARM BSP. + */ +/* + * RTEMS GBA BSP + * + * Copyright (c) 2004 Markku Puro <markku.puro@kopteri.net> + * + * The license and distribution terms for this file may be + * found in found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#ifndef __ARMMODEBITS_H +#define __ARMMODEBITS_H + +/*----------------------------------------------------------------------------- + * Definitions + ----------------------------------------------------------------------------*/ +#define Mode_USR 0x10 +#define Mode_FIQ 0x11 +#define Mode_IRQ 0x12 +#define Mode_SVC 0x13 +#define Mode_ABT 0x17 +#define Mode_ABORT 0x17 +#define Mode_UNDEF 0x1B +#define Mode_SYS 0x1F /**< only available on ARM Arch v4 */ +#define Mode_Bits 0x1F /**< mask for mode bits */ +#define ModePriv Mode_SVC /**< used supervisor mode */ + +#define I_Bit 0x80 +#define F_Bit 0x40 +#define Int_Bits 0xC0 + +#define Mode_SVC_MIRQ (Mode_SVC | I_Bit | F_Bit) +#define Mode_SVC_UIRQ (Mode_SVC) +#define Mode_IRQ_MIRQ (Mode_SVC | I_Bit | F_Bit) +#define Mode_IRQ_UIRQ (Mode_SVC) + +#endif // __ARMMODEBITS_H + |