diff options
author | Daniel Ramirez <javamonn@gmail.com> | 2013-12-21 15:50:55 -0600 |
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committer | Gedare Bloom <gedare@rtems.org> | 2013-12-22 14:04:22 -0500 |
commit | 49232d06500801051d8bf43e5979c1d7c0f0fd14 (patch) | |
tree | fa9fda6b4d72aa91ff49e84afb130de3576fae09 /c/src/lib/libbsp/arm/edb7312 | |
parent | gumstix: added new doxygen (diff) | |
download | rtems-49232d06500801051d8bf43e5979c1d7c0f0fd14.tar.bz2 |
arm_edb7312: added new doxygen
Diffstat (limited to 'c/src/lib/libbsp/arm/edb7312')
-rw-r--r-- | c/src/lib/libbsp/arm/edb7312/include/bsp.h | 29 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/edb7312/include/ep7312.h | 81 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/edb7312/irq/irq.h | 41 |
3 files changed, 135 insertions, 16 deletions
diff --git a/c/src/lib/libbsp/arm/edb7312/include/bsp.h b/c/src/lib/libbsp/arm/edb7312/include/bsp.h index 13e11f2fd3..dfb73cff71 100644 --- a/c/src/lib/libbsp/arm/edb7312/include/bsp.h +++ b/c/src/lib/libbsp/arm/edb7312/include/bsp.h @@ -1,3 +1,9 @@ +/** + * @file + * @ingroup arm_edb7312 + * @brief Global BSP definitions. + */ + /* * Cirrus EP7312 BSP header file * @@ -24,22 +30,35 @@ extern "C" { #define BSP_FEATURE_IRQ_EXTENSION -/* - * Define the interrupt mechanism for Time Test 27 +/** + * @defgroup arm_edb7312 EDB7312 Support + * @ingroup bsp_arm + * @brief EDB7312 Support Package + * @{ + */ + +/** + * @brief Define the interrupt mechanism for Time Test 27 * - * NOTE: Following are not defined and are board independent + * NOTE: Following are not defined and are board independent * */ struct rtems_bsdnet_ifconfig; int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching); -/* - * Network driver configuration +/** + * @name Network driver configuration + * @{ */ + #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" #define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach +/** @} */ + +/** @} */ + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h index cb110b9d1a..c1e530dc70 100644 --- a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h +++ b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h @@ -1,3 +1,9 @@ +/** + * @file + * @ingroup edb7312_registers + * @brief Register declarations. + */ + /* * Cirrus EP7312 register declarations * @@ -20,6 +26,13 @@ #define EP7312_REG_BASE 0x80000000 +/** + * @defgroup edb7312_registers Register Definitions + * @ingroup arm_edb7312 + * @brief Cirrus EP7312 Register Definitions + * @{ + */ + #define EP7312_PADR ((volatile uint8_t*)(EP7312_REG_BASE + 0x0000)) #define EP7312_PBDR ((volatile uint8_t*)(EP7312_REG_BASE + 0x0001)) #define EP7312_PDDR ((volatile uint8_t*)(EP7312_REG_BASE + 0x0003)) @@ -89,7 +102,12 @@ #define EP7312_RANDID3 ((volatile uint32_t*)(EP7312_REG_BASE + 0x270C)) /* serial port bits */ -/* BITS in UBRLCR1 */ + +/** + * @name BITS in UBRLCR1 + * @{ + */ + #define EP7312_UART_WRDLEN5 0x00000000 #define EP7312_UART_WRDLEN6 0x00020000 #define EP7312_UART_WRDLEN7 0x00040000 @@ -100,29 +118,60 @@ #define EP7312_UART_PRTEN 0x00002000 #define EP7312_UART_BREAK 0x00001000 -/* BITS in INTSR1 */ +/** @} */ + +/** + * @name BITS in INTSR1 + * @{ + */ + #define EP7312_UART_UTXINT1 0x00002000 #define EP7312_UART_URXINT1 0x00001000 -/* BITS in UARTTDR1 */ +/** @} */ + +/** + * @name BITS in UARTTDR1 + * @{ + */ + #define EP7312_UART_FRMERR 0x00000100 #define EP7312_UART_PARERR 0x00000200 #define EP7312_UART_OVERR 0x00000400 -/* BITS in system status flag register 1 */ +/** @} */ + +/** + * @name BITS in system status flag register 1 + * @{ + */ + #define EP7312_UART_UBUSY1 0x00000800 #define EP7312_UART_URXFE1 0x00400000 #define EP7312_UART_UTXFF1 0x00800000 +/** @} */ + /* system configuration bits */ -/* BITS in SYSCON1 */ + +/** + * @name BITS in SYSCON1 + * @{ + */ + #define EP7312_SYSCON1_UART1EN 0x00000100 #define EP7312_SYSCON1_TC1_PRESCALE 0x00000010 #define EP7312_SYSCON1_TC1_512KHZ 0x00000020 #define EP7312_SYSCON1_TC2_PRESCALE 0x00000040 #define EP7312_SYSCON1_TC2_512KHZ 0x00000080 -/* INTR1 (Interrupt 1) mask/status register bits */ +/** @} */ + +/** + * @name INTR1 (Interrupt 1) mask/status register bits + * @{ + */ + #define EP7312_INTR1_EXTFIQ 0x00000001 #define EP7312_INTR1_BLINT 0x00000002 #define EP7312_INTR1_WEINT 0x00000004 @@ -140,14 +189,30 @@ #define EP7312_INTR1_UMSINT 0x00004000 #define EP7312_INTR1_SSEOTI 0x00008000 -/* INTR2 (Interrupt 2) mask/status register bits */ +/** @} */ + +/** + * @name INTR2 (Interrupt 2) mask/status register bits + * @{ + */ + #define EP7312_INTR2_KBDINT 0x00000001 #define EP7312_INTR2_SS2RX 0x00000002 #define EP7312_INTR2_SS2TX 0x00000004 #define EP7312_INTR2_URXINT2 0x00001000 #define EP7312_INTR2_UTXINT2 0x00002000 -/* INTR3 (Interrupt 3) mask/status register bits */ +/** @} */ + +/** + * @name INTR3 (Interrupt 3) mask/status register bits + * @{ + */ + #define EP7312_INTR2_DAIINT 0x00000001 +/** @} */ + +/** @} */ + #endif /* __EP7312_H__ */ diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.h b/c/src/lib/libbsp/arm/edb7312/irq/irq.h index 0753a08a30..f0c833d7b7 100644 --- a/c/src/lib/libbsp/arm/edb7312/irq/irq.h +++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.h @@ -1,3 +1,9 @@ +/** + * @file + * @ingroup edb7312_interrupt + * @brief Interrupt definitions. + */ + /* * Cirrus EP7312 Intererrupt handler * @@ -23,7 +29,18 @@ #endif /* __asm__ */ - /* int interrupt status/mask register 1 */ +/** + * @defgroup edb7312_interrupt Interrupt Support + * @ingroup arm_edb7312 + * @brief Interrupt Support + * @{ + */ + +/** + * @name int interrupt status/mask register 1 + * @{ + */ + #define BSP_EXTFIQ 0 #define BSP_BLINT 1 #define BSP_WEINT 2 @@ -40,18 +57,36 @@ #define BSP_URXINT1 13 #define BSP_UMSINT 14 #define BSP_SSEOTI 15 - /* int interrupt status/mask register 2 */ + +/** @} */ + +/** + * @name int interrupt status/mask register 2 + * @{ + */ + #define BSP_KBDINT 16 #define BSP_SS2RX 17 #define BSP_SS2TX 18 #define BSP_UTXINT2 19 #define BSP_URXINT2 20 - /* int interrupt status/mask register 3 */ + +/** @} */ + +/** + * @name int interrupt status/mask register 3 + * @{ + */ + #define BSP_DAIINT 21 #define BSP_MAX_INT 22 +/** @} */ + #define BSP_INTERRUPT_VECTOR_MIN 0 #define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1) +/** @} */ + #endif /* __IRQ_H__ */ |