bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

4 files changed, 0 insertions, 193 deletions

diff --git a/c/src/lib/libbsp/arm/csb336/startup/bsp_specs b/c/src/lib/libbsp/arm/csb336/startup/bsp_specs
deleted file mode 100644
index 47dd31d46b..0000000000
--- a/c/src/lib/libbsp/arm/csb336/startup/bsp_specs
+++ /dev/null
@@ -1,9 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
-
-*endfile:
-%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/c/src/lib/libbsp/arm/csb336/startup/bspstart.c b/c/src/lib/libbsp/arm/csb336/startup/bspstart.c
deleted file mode 100644
index 8970dfbe4a..0000000000
--- a/c/src/lib/libbsp/arm/csb336/startup/bspstart.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Cogent CSB336 - MC9328MXL SBC startup code
- */
-
-/*
- * Copyright (c) 2004 by Cogent Computer Systems
- * Written by Jay Monkman <jtm@lopingdog.com>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <bsp/irq-generic.h>
-#include <rtems/bspIo.h>
-#include <mc9328mxl.h>
-#include <libcpu/mmu.h>
-
-/*
- * bsp_start_default - BSP initialization function
- *
- *   This function is called before RTEMS is initialized and used
- *   adjust the kernel's configuration.
- *
- *   This function also configures the CPU's memory protection unit.
- *
- * RESTRICTIONS/LIMITATIONS:
- *   Since RTEMS is not configured, no RTEMS functions can be called.
- *
- */
-static void bsp_start_default( void )
-{
-  int i;
-
-  /* Set the MCU prescaler to divide by 1 */
-  MC9328MXL_PLL_CSCR &= ~MC9328MXL_PLL_CSCR_PRESC;
-
-  /* Enable the MCU PLL */
-  MC9328MXL_PLL_CSCR |= MC9328MXL_PLL_CSCR_MPEN;
-
-  /* Delay to allow time for PLL to get going */
-  for (i = 0; i < 100; i++) {
-    __asm__ volatile ("nop\n");
-  }
-
-  /* Set the CPU to asynchrous clock mode, so it uses its fastest clock */
-  mmu_set_cpu_async_mode();
-
-  /* disable interrupts */
-  MC9328MXL_AITC_INTENABLEL = 0;
-  MC9328MXL_AITC_INTENABLEH = 0;
-
-  /* Set interrupt priority to -1 (allow all priorities) */
-  MC9328MXL_AITC_NIMASK = 0x1f;
-
-  /*
-   * Init rtems interrupt management
-   */
-  bsp_interrupt_initialize();
-} /* bsp_start */
-
-/* Calcuate the frequency for perclk1 */
-int get_perclk1_freq(void)
-{
-  unsigned int fin;
-  unsigned int fpll;
-  unsigned int pd;
-  unsigned int mfd;
-  unsigned int mfi;
-  unsigned int mfn;
-  uint32_t reg;
-  int perclk1;
-
-  if (MC9328MXL_PLL_CSCR & MC9328MXL_PLL_CSCR_SYSSEL) {
-    /* Use external oscillator */
-    fin = BSP_OSC_FREQ;
-  } else {
-    /* Use scaled xtal freq */
-    fin = BSP_XTAL_FREQ * 512;
-  }
-
-  /* calculate the output of the system PLL */
-  reg = MC9328MXL_PLL_SPCTL0;
-  pd = ((reg & MC9328MXL_PLL_SPCTL_PD_MASK) >>
-        MC9328MXL_PLL_SPCTL_PD_SHIFT);
-  mfd = ((reg & MC9328MXL_PLL_SPCTL_MFD_MASK) >>
-         MC9328MXL_PLL_SPCTL_MFD_SHIFT);
-  mfi = ((reg & MC9328MXL_PLL_SPCTL_MFI_MASK) >>
-         MC9328MXL_PLL_SPCTL_MFI_SHIFT);
-  mfn = ((reg & MC9328MXL_PLL_SPCTL_MFN_MASK) >>
-         MC9328MXL_PLL_SPCTL_MFN_SHIFT);
-
-#if 0
-  printk("fin = %d\n", fin);
-  printk("pd = %d\n", pd);
-  printk("mfd = %d\n", mfd);
-  printk("mfi = %d\n", mfi);
-  printk("mfn = %d\n", mfn);
-  printk("rounded (fin * mfi) / (pd + 1) = %d\n", (fin * mfi) / (pd + 1));
-  printk("rounded (fin * mfn) / ((pd + 1) * (mfd + 1)) = %d\n",
-         ((long long)fin * mfn) / ((pd + 1) * (mfd + 1)));
-#endif
-
-  fpll = 2 * ( ((fin * mfi  + (pd + 1) / 2) / (pd + 1)) +
-               (((long long)fin * mfn + ((pd + 1) * (mfd + 1)) / 2) /
-               ((pd + 1) * (mfd + 1))) );
-
-  /* calculate the output of the PERCLK1 divider */
-  reg = MC9328MXL_PLL_PCDR;
-  perclk1 = fpll / (1 + ((reg & MC9328MXL_PLL_PCDR_PCLK1_MASK) >>
-                         MC9328MXL_PLL_PCDR_PCLK1_SHIFT));
-
-  return perclk1;
-}
-
-/*
- *  By making this a weak alias for bsp_start_default, a brave soul
- *  can override the actual bsp_start routine used.
- */
-void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
-
diff --git a/c/src/lib/libbsp/arm/csb336/startup/linkcmds b/c/src/lib/libbsp/arm/csb336/startup/linkcmds
deleted file mode 100644
index 2f6f8bd89d..0000000000
--- a/c/src/lib/libbsp/arm/csb336/startup/linkcmds
+++ /dev/null
@@ -1,27 +0,0 @@
-MEMORY {
-	SDRAM_VEC : ORIGIN = 0x08200000, LENGTH = 16k
-	SDRAM_MMU : ORIGIN = 0x08204000, LENGTH = 16k
-	SDRAM :     ORIGIN = 0x08208000, LENGTH = 30M - 32k
-}
-
-REGION_ALIAS ("REGION_START", SDRAM_VEC);
-REGION_ALIAS ("REGION_VECTOR", SDRAM);
-REGION_ALIAS ("REGION_TEXT", SDRAM);
-REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
-REGION_ALIAS ("REGION_RODATA", SDRAM);
-REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_DATA", SDRAM);
-REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
-REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
-REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
-REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_BSS", SDRAM);
-REGION_ALIAS ("REGION_WORK", SDRAM);
-REGION_ALIAS ("REGION_STACK", SDRAM);
-REGION_ALIAS ("REGION_NOCACHE", SDRAM);
-REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
-
-_ttbl_base = ORIGIN (SDRAM_MMU);
-
-INCLUDE linkcmds.armv4
diff --git a/c/src/lib/libbsp/arm/csb336/startup/memmap.c b/c/src/lib/libbsp/arm/csb336/startup/memmap.c
deleted file mode 100644
index a61fc6e2cf..0000000000
--- a/c/src/lib/libbsp/arm/csb336/startup/memmap.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- *  CSB336 Memory Map
- *
- *  Copyright (c) 2004 by Cogent Computer Systems
- *  Written by Jay Monkman <jtm@lopingdog.com>
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-#include <rtems.h>
-#include <libcpu/mmu.h>
-
-/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than
- * that, you'll have TLB lookups, which could hurt performance.
- */
-mmu_sect_map_t mem_map[] = {
-/*  <phys addr>  <virt addr> <size> <flags> */
-    {0x08200000, 0x00000000,   1,    MMU_CACHE_WBACK},     /* Mirror of SDRAM */
-    {0x00100000, 0x00100000,   1,    MMU_CACHE_NONE},     /* Bootstrap ROM */
-    {0x00200000, 0x00200000,   2,    MMU_CACHE_NONE},     /* Internal Regs + eSRAM */
-
-    {0x08000000, 0x08000000,   1,    MMU_CACHE_NONE},     /* SDRAM */
-    {0x08100000, 0x08100000,   1,    MMU_CACHE_WTHROUGH}, /* SDRAM */
-    {0x08200000, 0x08200000,  30,    MMU_CACHE_WBACK},    /* SDRAM */
-
-    {0x10000000, 0x10000000,   8,    MMU_CACHE_NONE},     /* CS0 - Flash */
-    {0x12000000, 0x12000000,   1,    MMU_CACHE_NONE},     /* CS1 - enet */
-    {0x13000000, 0x13000000,   1,    MMU_CACHE_NONE},     /* CS2 - */
-    {0x14000000, 0x14000000,   1,    MMU_CACHE_NONE},     /* CS3 - */
-    {0x15000000, 0x15000000,   1,    MMU_CACHE_NONE},     /* CS4 - */
-    {0x16000000, 0x16000000,   1,    MMU_CACHE_NONE},     /* CS5 - */
-    {0x50000000, 0x50000000,   1,    MMU_CACHE_NONE},     /* ARM Test Regs */
-    {0x00000000, 0x00000000,   0,    0}                   /* The end */
-};