diff options
author | Christian Mauderer <Christian.Mauderer@embedded-brains.de> | 2017-11-17 09:21:59 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-11-17 14:13:40 +0100 |
commit | d00a7d1c22fd6e9965ef22c77aaf3be1b418e694 (patch) | |
tree | a15b5add00ae50b197ebdffdf2c4d02188236c4c /c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c | |
parent | bsp/atsam: Make clock application configurable. (diff) | |
download | rtems-d00a7d1c22fd6e9965ef22c77aaf3be1b418e694.tar.bz2 |
bsp/atsam: Move clock and SDRAM init to SRAM.
If necessary, the BSP can now have it's clock and SDRAM initialization
in the SRAM instead of the SDRAM. This allows to change the clock
frequency during the startup of an SDRAM application.
Diffstat (limited to 'c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c')
-rw-r--r-- | c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c | 65 |
1 files changed, 45 insertions, 20 deletions
diff --git a/c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c index 8a42fd82bf..697ec88d67 100644 --- a/c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c @@ -70,32 +70,28 @@ static BSP_START_TEXT_SECTION bool tcm_setup_and_check_if_do_efc_config( } } -void BSP_START_TEXT_SECTION bsp_start_hook_0(void) +static bool ATSAM_START_SRAM_SECTION sdram_settings_unchanged(void) { - uintptr_t tcm_size; - uint32_t itcmcr_sz; + return ( + (SDRAMC->SDRAMC_CR == BOARD_Sdram_Config.sdramc_cr) && + (SDRAMC->SDRAMC_TR == BOARD_Sdram_Config.sdramc_tr) && + (SDRAMC->SDRAMC_MDR == BOARD_Sdram_Config.sdramc_mdr) && + (SDRAMC->SDRAMC_CFR1 == BOARD_Sdram_Config.sdramc_cfr1) + ); +} - system_init_flash(BOARD_MCK); +static void ATSAM_START_SRAM_SECTION setup_CPU_and_SDRAM(void) +{ SystemInit(); - - PIO_Configure(&atsam_pin_config[0], atsam_pin_config_count); - MATRIX->CCFG_SYSIO = atsam_matrix_ccfg_sysio; - - if (!PMC_IsPeriphEnabled(ID_SDRAMC)) { + if (!PMC_IsPeriphEnabled(ID_SDRAMC) || !sdram_settings_unchanged()) { BOARD_ConfigureSdram(); } +} - if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) { - SCB_EnableICache(); - } - - if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) { - SCB_EnableDCache(); - } - - _SetupMemoryRegion(); - - /* Configure tightly coupled memory interfaces */ +static void configure_tcm(void) +{ + uintptr_t tcm_size; + uint32_t itcmcr_sz; tcm_size = (uintptr_t) atsam_memory_itcm_size; itcmcr_sz = (SCB->ITCMCR & SCB_ITCMCR_SZ_Msk) >> SCB_ITCMCR_SZ_Pos; @@ -121,6 +117,35 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void) } } +void BSP_START_TEXT_SECTION bsp_start_hook_0(void) +{ + system_init_flash(BOARD_MCK); + + PIO_Configure(&atsam_pin_config[0], atsam_pin_config_count); + MATRIX->CCFG_SYSIO = atsam_matrix_ccfg_sysio; + + configure_tcm(); +#if ATSAM_CHANGE_CLOCK_FROM_SRAM != 0 + /* Early copy of .fast_text section for CPU and SDRAM setup. */ + bsp_start_memcpy_libc( + bsp_section_fast_text_begin, + bsp_section_fast_text_load_begin, + (size_t) bsp_section_fast_text_size + ); +#endif + setup_CPU_and_SDRAM(); + + if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) { + SCB_EnableICache(); + } + + if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) { + SCB_EnableDCache(); + } + + _SetupMemoryRegion(); +} + void BSP_START_TEXT_SECTION bsp_start_hook_1(void) { bsp_start_copy_sections_compact(); |