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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 16:01:48 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 16:01:48 +0000
commitf05b2ac0bc4626e854afc6e6a5d1b88071adbd7c (patch)
tree4150010cec9b6b51100f183b435955cd847679b4 /c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
parentRemove stray white spaces. (diff)
downloadrtems-f05b2ac0bc4626e854afc6e6a5d1b88071adbd7c.tar.bz2
Remove duplicate white lines.
Diffstat (limited to 'c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S')
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S4
1 files changed, 0 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
index 6e9db56afe..7352d30123 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
@@ -29,18 +29,15 @@
.equ I_Bit, 0x80
.equ F_Bit, 0x40
-
.text
.globl _start
-
_start:
/*
* Here is the code to initialize the low-level BSP environment
* (Chip Select, PLL, ....?)
-
/* Copy data from FLASH to RAM */
LDR r0, =_initdata /* load address of region */
LDR r1, =0x400000 /* execution address of region */
@@ -61,7 +58,6 @@ zi_init:
STRLOT r2, [r0], #4
BLO zi_init
-
/* Load basic ARM7 interrupt table */
VectorInit:
MOV R8, #0