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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-04-27 15:30:59 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-04-27 15:30:59 +0000 |
| commit | eac9871aa29f8a8079d2cd0f9cd7c12c006cf3d9 (patch) | |
| tree | bf15330733e84aaa33909a21bf44a3f19bddf303 /c/src/exec | |
| parent | Fixed trace bit manipulation per requests from Eric Norum and Chris Johns. (diff) | |
| download | rtems-eac9871aa29f8a8079d2cd0f9cd7c12c006cf3d9.tar.bz2 | |
Fixed spelling errors.
Diffstat (limited to 'c/src/exec')
| -rw-r--r-- | c/src/exec/score/cpu/m68k/cpu_asm.s | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/m68k/cpu_asm.s b/c/src/exec/score/cpu/m68k/cpu_asm.s index d9806add50..fc14b40bcc 100644 --- a/c/src/exec/score/cpu/m68k/cpu_asm.s +++ b/c/src/exec/score/cpu/m68k/cpu_asm.s @@ -112,9 +112,9 @@ norst: frestore a0@+ | restore the fp state frame * With this approach, lower priority interrupts may * execute twice if a higher priority interrupt is * acknowledged before _Thread_Dispatch_disable is - * increamented and the higher priority interrupt - * preforms a context switch after executing. The lower - * priority intterrupt will execute (1) at the end of the + * incremented and the higher priority interrupt + * performs a context switch after executing. The lower + * priority interrupt will execute (1) at the end of the * higher priority interrupt in the new context if * permitted by the new interrupt level mask, and (2) when * the original context regains the cpu. |