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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-06-25 16:10:45 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-06-25 16:10:45 +0000
commit924e17ac81a222e71f38982538297f3e84b26dff (patch)
tree561809615041824440991706934e4b35b1f9ac25 /c/src/exec/score/cpu
parentSuggestion from Robin Kirkham <Robin.Kirkham@mlb.dmt.csiro.au> to improve (diff)
downloadrtems-924e17ac81a222e71f38982538297f3e84b26dff.tar.bz2
Patch from Robin Kirkham <Robin.Kirkham@mlb.dmt.csiro.au> to distinguish
between CPU32 and CPU32+ cores. Commentary follows: Unfortunately c/src/exec/score/cpu/m68k/m68k.h incorrectly defines M68K_HAS_MISALIGNED for the plain old CPU32 (it is correct for the CPU32+). As a consequence, the recently-relocated m68k memcpy() may still attempt misaligned memory accesses. I suggest that until such time as egcs/gcc differentiates these cores that we invent a new preprocessor symbol, RTEMS__mcpu32p__ for this purpose, on the assumption that egcs may one day grow a -mcpu32+ option which will define a __mcpu32p__ symbol (whether this option would also define __mcpu32__ is yet to be resolved). BSPs that have a CPU32+ (like gen68360) would for the time being define RTEMS__mcpu32p__ using -D. The symbol is `RTEMS__mcpu32p__' because symbols of the form __xxx__ should only be defined by the compiler itself. Note that the patch tests for RTEMS__mcpu32p__ *before* __mcpu32__, since __mcpu32__ is still defined for the CPU32+. It does not change the gen68360 BSP. An aside: Note that in egcs-1.0.3a, the option -m68332 is identical to -mcpu32, except it defines __mc68332__ as well as __mcpu32__. This is only for the sake of compatibility. The story with -m68302 is similar; it defines __mc68302__ and __mc68000__. In my opinion these options are depreciated and ought to be avoided in RTEMS.
Diffstat (limited to 'c/src/exec/score/cpu')
-rw-r--r--c/src/exec/score/cpu/m68k/m68k.h25
1 files changed, 18 insertions, 7 deletions
diff --git a/c/src/exec/score/cpu/m68k/m68k.h b/c/src/exec/score/cpu/m68k/m68k.h
index a6d24562d2..1d12e9ea10 100644
--- a/c/src/exec/score/cpu/m68k/m68k.h
+++ b/c/src/exec/score/cpu/m68k/m68k.h
@@ -37,10 +37,20 @@ extern "C" {
* -m68040 -msoft-float
* -m68040
* -m68040 -msoft-float
- * -m68302 (no FP)
- * -m68332 (no FP)
+ * -m68302 (no FP) (deprecated, use -m68000)
+ * -m68332 (no FP) (deprecated, use -mcpu32)
* -mcpu32 (no FP)
*
+ * As of gcc 2.8.1 and egcs 1.1, there is no distinction made between
+ * the CPU32 and CPU32+. The option -mcpu32 generates code which can
+ * be run on either core. RTEMS distinguishes between these two cores
+ * because they have different alignment rules which impact performance.
+ * If you are using a CPU32+, then the symbol RTEMS__mcpu32p__ should
+ * be defined in your custom file (see make/custom/gen68360.cfg for an
+ * example of how to do this. If gcc ever distinguishes between these
+ * two cores, then RTEMS__mcpu32p__ usage will be replaced with the
+ * appropriate compiler defined predefine.
+ *
* Here is some information on the 040 variants (courtesy of Doug McBride,
* mcbride@rodin.colorado.edu):
*
@@ -129,27 +139,28 @@ extern "C" {
#define M68K_HAS_FPU 0
#define M68K_HAS_FPSP_PACKAGE 0
-#elif defined(__mc68332__)
+ /* gcc and egcs do not distinguish between CPU32 and CPU32+ */
+#elif defined(RTEMS__mcpu32p__)
-#define CPU_MODEL_NAME "mcpu32"
+#define CPU_MODEL_NAME "mcpu32+"
#define M68K_HAS_VBR 1
#define M68K_HAS_SEPARATE_STACKS 0
#define M68K_HAS_BFFFO 0
#define M68K_HAS_PREINDEXING 1
#define M68K_HAS_EXTB_L 1
-#define M68K_HAS_MISALIGNED 0
+#define M68K_HAS_MISALIGNED 1
#define M68K_HAS_FPU 0
#define M68K_HAS_FPSP_PACKAGE 0
#elif defined(__mcpu32__)
-#define CPU_MODEL_NAME "mcpu32+"
+#define CPU_MODEL_NAME "mcpu32"
#define M68K_HAS_VBR 1
#define M68K_HAS_SEPARATE_STACKS 0
#define M68K_HAS_BFFFO 0
#define M68K_HAS_PREINDEXING 1
#define M68K_HAS_EXTB_L 1
-#define M68K_HAS_MISALIGNED 1
+#define M68K_HAS_MISALIGNED 0
#define M68K_HAS_FPU 0
#define M68K_HAS_FPSP_PACKAGE 0