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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:16:00 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:16:00 +0000
commit4db302830436a61c9af69d0b393f9ac44a558c2e (patch)
treecf5f2b3c3fd87618d3f0bebf9b4e203933c7fb49 /c/src/exec/score/cpu
parent75ad73760f33b0d2b30061919d8d4b4bf0b4277b (diff)
downloadrtems-4db302830436a61c9af69d0b393f9ac44a558c2e.tar.bz2
2001-11-28 Joel Sherrill <joel@OARcorp.com>,
This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation.
Diffstat (limited to 'c/src/exec/score/cpu')
-rw-r--r--c/src/exec/score/cpu/a29k/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/a29k/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/arm/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/arm/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/c4x/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/c4x/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/h8300/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/h8300/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/hppa1.1/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/hppa1.1/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/i386/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/i386/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/i960/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/i960/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/mips/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/mips64orion/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/mips64orion/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/no_cpu/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/no_cpu/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/or16/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/or16/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/or32/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/or32/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/powerpc/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/sh/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/sh/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/sparc/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/sparc/rtems/score/cpu.h7
-rw-r--r--c/src/exec/score/cpu/unix/ChangeLog14
-rw-r--r--c/src/exec/score/cpu/unix/rtems/score/cpu.h7
32 files changed, 231 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/a29k/ChangeLog b/c/src/exec/score/cpu/a29k/ChangeLog
index 7afa8b0ba4..9d180ae8cf 100644
--- a/c/src/exec/score/cpu/a29k/ChangeLog
+++ b/c/src/exec/score/cpu/a29k/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/a29k/rtems/score/cpu.h b/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
index bfdf4f38a0..8afa432865 100644
--- a/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
@@ -543,6 +543,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*/
diff --git a/c/src/exec/score/cpu/arm/ChangeLog b/c/src/exec/score/cpu/arm/ChangeLog
index 9f5d00fa90..882e0acab4 100644
--- a/c/src/exec/score/cpu/arm/ChangeLog
+++ b/c/src/exec/score/cpu/arm/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/arm/rtems/score/cpu.h b/c/src/exec/score/cpu/arm/rtems/score/cpu.h
index 0100d958bd..62adccfe5d 100644
--- a/c/src/exec/score/cpu/arm/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/arm/rtems/score/cpu.h
@@ -465,6 +465,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*/
diff --git a/c/src/exec/score/cpu/c4x/ChangeLog b/c/src/exec/score/cpu/c4x/ChangeLog
index 1ebb66b30c..e88b2c99d6 100644
--- a/c/src/exec/score/cpu/c4x/ChangeLog
+++ b/c/src/exec/score/cpu/c4x/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/c4x/rtems/score/cpu.h b/c/src/exec/score/cpu/c4x/rtems/score/cpu.h
index 2407c34ed8..0e08d5d555 100644
--- a/c/src/exec/score/cpu/c4x/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/c4x/rtems/score/cpu.h
@@ -679,6 +679,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/h8300/ChangeLog b/c/src/exec/score/cpu/h8300/ChangeLog
index 4c876525b2..d4aa25a257 100644
--- a/c/src/exec/score/cpu/h8300/ChangeLog
+++ b/c/src/exec/score/cpu/h8300/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/h8300/rtems/score/cpu.h b/c/src/exec/score/cpu/h8300/rtems/score/cpu.h
index 055a006aed..b513190c7d 100644
--- a/c/src/exec/score/cpu/h8300/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/h8300/rtems/score/cpu.h
@@ -529,6 +529,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/hppa1.1/ChangeLog b/c/src/exec/score/cpu/hppa1.1/ChangeLog
index 20bd9f8ca2..59551a3972 100644
--- a/c/src/exec/score/cpu/hppa1.1/ChangeLog
+++ b/c/src/exec/score/cpu/hppa1.1/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/hppa1.1/rtems/score/cpu.h b/c/src/exec/score/cpu/hppa1.1/rtems/score/cpu.h
index 469b071532..fe93beaa00 100644
--- a/c/src/exec/score/cpu/hppa1.1/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/hppa1.1/rtems/score/cpu.h
@@ -303,6 +303,13 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Don't be chintzy here; we don't want to debug these problems
* Some of the tests eat almost 4k.
* Plus, the HPPA always allocates chunks of 64 bytes for stack
diff --git a/c/src/exec/score/cpu/i386/ChangeLog b/c/src/exec/score/cpu/i386/ChangeLog
index 60aff5bd65..9df08a0ada 100644
--- a/c/src/exec/score/cpu/i386/ChangeLog
+++ b/c/src/exec/score/cpu/i386/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/i386/rtems/score/cpu.h b/c/src/exec/score/cpu/i386/rtems/score/cpu.h
index c70773546f..f303a89cb8 100644
--- a/c/src/exec/score/cpu/i386/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/i386/rtems/score/cpu.h
@@ -250,6 +250,13 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Minimum size of a thread's stack.
*/
diff --git a/c/src/exec/score/cpu/i960/ChangeLog b/c/src/exec/score/cpu/i960/ChangeLog
index 39b01acded..2811facb54 100644
--- a/c/src/exec/score/cpu/i960/ChangeLog
+++ b/c/src/exec/score/cpu/i960/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/i960/rtems/score/cpu.h b/c/src/exec/score/cpu/i960/rtems/score/cpu.h
index bc13335e92..98b098ad2f 100644
--- a/c/src/exec/score/cpu/i960/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/i960/rtems/score/cpu.h
@@ -215,6 +215,13 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Minimum size of a thread's stack.
*
* NOTE: See CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK
diff --git a/c/src/exec/score/cpu/m68k/rtems/score/cpu.h b/c/src/exec/score/cpu/m68k/rtems/score/cpu.h
index c1d3f6ac58..7ee4bc0110 100644
--- a/c/src/exec/score/cpu/m68k/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/cpu.h
@@ -281,6 +281,13 @@ SCORE_EXTERN _CPU_ISR_handler_entry _CPU_ISR_jump_table[256];
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Minimum size of a thread's stack.
*/
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog
index 35ece7d8e0..ee756c8b72 100644
--- a/c/src/exec/score/cpu/mips/ChangeLog
+++ b/c/src/exec/score/cpu/mips/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-12 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
diff --git a/c/src/exec/score/cpu/mips/rtems/score/cpu.h b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
index bd92ae0f65..a540528379 100644
--- a/c/src/exec/score/cpu/mips/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
@@ -555,6 +555,13 @@ extern unsigned int mips_interrupt_number_of_vectors;
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*/
diff --git a/c/src/exec/score/cpu/mips64orion/ChangeLog b/c/src/exec/score/cpu/mips64orion/ChangeLog
index ac1d673257..ab43547a5e 100644
--- a/c/src/exec/score/cpu/mips64orion/ChangeLog
+++ b/c/src/exec/score/cpu/mips64orion/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/mips64orion/rtems/score/cpu.h b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu.h
index 0ed3da7ed4..684e6cfcf4 100644
--- a/c/src/exec/score/cpu/mips64orion/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu.h
@@ -519,6 +519,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*/
diff --git a/c/src/exec/score/cpu/no_cpu/ChangeLog b/c/src/exec/score/cpu/no_cpu/ChangeLog
index 8a1681ac54..a651ed5b0b 100644
--- a/c/src/exec/score/cpu/no_cpu/ChangeLog
+++ b/c/src/exec/score/cpu/no_cpu/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/no_cpu/rtems/score/cpu.h b/c/src/exec/score/cpu/no_cpu/rtems/score/cpu.h
index 729fce9364..98a105f795 100644
--- a/c/src/exec/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/no_cpu/rtems/score/cpu.h
@@ -556,6 +556,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/or16/ChangeLog b/c/src/exec/score/cpu/or16/ChangeLog
index a0d9168624..2b17bafef2 100644
--- a/c/src/exec/score/cpu/or16/ChangeLog
+++ b/c/src/exec/score/cpu/or16/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/or16/rtems/score/cpu.h b/c/src/exec/score/cpu/or16/rtems/score/cpu.h
index 8258281b19..f5991461c2 100644
--- a/c/src/exec/score/cpu/or16/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/or16/rtems/score/cpu.h
@@ -556,6 +556,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/or32/ChangeLog b/c/src/exec/score/cpu/or32/ChangeLog
index 387e7cc5dc..b364699882 100644
--- a/c/src/exec/score/cpu/or32/ChangeLog
+++ b/c/src/exec/score/cpu/or32/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/or32/rtems/score/cpu.h b/c/src/exec/score/cpu/or32/rtems/score/cpu.h
index f6929b7696..d46f206a81 100644
--- a/c/src/exec/score/cpu/or32/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/or32/rtems/score/cpu.h
@@ -556,6 +556,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/powerpc/ChangeLog b/c/src/exec/score/cpu/powerpc/ChangeLog
index 11b783fd05..6a73757211 100644
--- a/c/src/exec/score/cpu/powerpc/ChangeLog
+++ b/c/src/exec/score/cpu/powerpc/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-11-14 Joel Sherrill <joel@OARcorp.com>
* shared/ppc.h: The mpc8260 uses the new exception processing model
diff --git a/c/src/exec/score/cpu/sh/ChangeLog b/c/src/exec/score/cpu/sh/ChangeLog
index 87525abb4e..b8b7786bef 100644
--- a/c/src/exec/score/cpu/sh/ChangeLog
+++ b/c/src/exec/score/cpu/sh/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* cpu.c: Fix #ifdefs, add missing #endif.
diff --git a/c/src/exec/score/cpu/sh/rtems/score/cpu.h b/c/src/exec/score/cpu/sh/rtems/score/cpu.h
index 60d3fbd6ed..06b8348559 100644
--- a/c/src/exec/score/cpu/sh/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/sh/rtems/score/cpu.h
@@ -498,6 +498,13 @@ SCORE_EXTERN void CPU_delay( unsigned32 microseconds );
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/sparc/ChangeLog b/c/src/exec/score/cpu/sparc/ChangeLog
index e86a1bc4e5..1b41018744 100644
--- a/c/src/exec/score/cpu/sparc/ChangeLog
+++ b/c/src/exec/score/cpu/sparc/ChangeLog
@@ -1,3 +1,10 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/sparc/rtems/score/cpu.h b/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
index 7f6383a0e1..257e32317e 100644
--- a/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
@@ -650,6 +650,13 @@ SCORE_EXTERN unsigned8 _CPU_Trap_Table_area[ 8192 ]
#define SPARC_REAL_TRAP_NUMBER( _trap ) ((_trap) % 256)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all tests. This insures
* that a "reasonable" small application should not have any problems.
*
diff --git a/c/src/exec/score/cpu/unix/ChangeLog b/c/src/exec/score/cpu/unix/ChangeLog
index e17dcbf749..2ac15d5061 100644
--- a/c/src/exec/score/cpu/unix/ChangeLog
+++ b/c/src/exec/score/cpu/unix/ChangeLog
@@ -1,3 +1,17 @@
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
+2001-11-28 Joel Sherrill <joel@OARcorp.com>,
+
+ This was tracked as PR91.
+ * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
+ is used to specify if the port uses the standard macro for this (FALSE).
+ A TRUE setting indicates the port provides its own implementation.
+
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
diff --git a/c/src/exec/score/cpu/unix/rtems/score/cpu.h b/c/src/exec/score/cpu/unix/rtems/score/cpu.h
index ba500372c6..1e5271291d 100644
--- a/c/src/exec/score/cpu/unix/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/unix/rtems/score/cpu.h
@@ -616,6 +616,13 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)();
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
+ * This is defined if the port has a special way to report the ISR nesting
+ * level. Most ports maintain the variable _ISR_Nest_level.
+ */
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+/*
* Should be large enough to run all RTEMS tests. This insures
* that a "reasonable" small application should not have any problems.
*/