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authorJoel Sherrill <joel.sherrill@OARcorp.com>1996-02-21 14:43:34 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1996-02-21 14:43:34 +0000
commit75f09e52dea753e8ff655fcd16088135cd894136 (patch)
tree4843b2b16abb4081d6702c5d53fa7ed8c9ab6bec /c/src/exec/score/cpu/sparc
parentMPCI Receive became a thread and the prototype changed. (diff)
downloadrtems-75f09e52dea753e8ff655fcd16088135cd894136.tar.bz2
Dispersal of internal thread handler resulted in IDLE thread becoming
part of the Thread Handler. This required the name of the optional CPU dependent IDLE thread implementation to change.
Diffstat (limited to 'c/src/exec/score/cpu/sparc')
-rw-r--r--c/src/exec/score/cpu/sparc/cpu.c4
-rw-r--r--c/src/exec/score/cpu/sparc/cpu.h16
2 files changed, 10 insertions, 10 deletions
diff --git a/c/src/exec/score/cpu/sparc/cpu.c b/c/src/exec/score/cpu/sparc/cpu.c
index 9f242d4a8f..23a93f176e 100644
--- a/c/src/exec/score/cpu/sparc/cpu.c
+++ b/c/src/exec/score/cpu/sparc/cpu.c
@@ -376,7 +376,7 @@ void _CPU_Context_Initialize(
/*PAGE
*
- * _CPU_Internal_threads_Idle_thread_body
+ * _CPU_Thread_Idle_body
*
* Some SPARC implementations have low power, sleep, or idle modes. This
* tries to take advantage of those models.
@@ -392,7 +392,7 @@ void _CPU_Context_Initialize(
#if defined(erc32)
-void _CPU_Internal_threads_Idle_thread_body( void )
+void _CPU_Thread_Idle_body( void )
{
while (1) {
ERC32_MEC.Power_Down = 0; /* value is irrelevant */
diff --git a/c/src/exec/score/cpu/sparc/cpu.h b/c/src/exec/score/cpu/sparc/cpu.h
index b6bcb91738..5c0a9a2ca2 100644
--- a/c/src/exec/score/cpu/sparc/cpu.h
+++ b/c/src/exec/score/cpu/sparc/cpu.h
@@ -145,9 +145,9 @@ extern "C" {
/*
* Does this port provide a CPU dependent IDLE task implementation?
*
- * If TRUE, then the routine _CPU_Internal_threads_Idle_thread_body
+ * If TRUE, then the routine _CPU_Thread_Idle_body
* must be provided and is the default IDLE thread body instead of
- * _Internal_threads_Idle_thread_body.
+ * _CPU_Thread_Idle_body.
*
* If FALSE, then use the generic IDLE thread body if the BSP does
* not provide one.
@@ -507,7 +507,7 @@ typedef struct {
void (*idle_task)( void );
boolean do_zero_of_workspace;
unsigned32 interrupt_stack_size;
- unsigned32 extra_system_initialization_stack;
+ unsigned32 extra_mpci_receive_server_stack;
} rtems_cpu_table;
/*
@@ -601,11 +601,11 @@ EXTERN unsigned8 _CPU_Trap_Table_area[ 8192 ]
/*
* Amount of extra stack (above minimum stack size) required by
- * system initialization thread. Remember that in a multiprocessor
- * system the system intialization thread becomes the MP server thread.
+ * MPCI receive server thread. Remember that in a multiprocessor
+ * system this thread must exist and be able to process all directives.
*/
-#define CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK 1024
+#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 1024
/*
* This defines the number of entries in the ISR_Vector_table managed
@@ -898,13 +898,13 @@ void _CPU_ISR_install_vector(
#if (CPU_PROVIDES_IDLE_THREAD_BODY == TRUE)
/*
- * _CPU_Internal_threads_Idle_thread_body
+ * _CPU_Thread_Idle_body
*
* Some SPARC implementations have low power, sleep, or idle modes. This
* tries to take advantage of those models.
*/
-void _CPU_Internal_threads_Idle_thread_body( void );
+void _CPU_Thread_Idle_body( void );
#endif /* CPU_PROVIDES_IDLE_THREAD_BODY */