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authorJoel Sherrill <joel.sherrill@OARcorp.com>1997-07-10 19:09:16 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1997-07-10 19:09:16 +0000
commit487c4f62d3594706575a0eb000f49a96cd4d4b5d (patch)
tree76d22a0272a9c6c555178714df09849f68d79be2 /c/src/exec/score/cpu/m68k
parentRepository damaged -- file re-added (diff)
downloadrtems-487c4f62d3594706575a0eb000f49a96cd4d4b5d.tar.bz2
Strip the trace bit from the SR register when dispatching a thread when
exiting from an ISR. This allows the trace bit to be set on a per task basis and tracing to be limited to that task.
Diffstat (limited to 'c/src/exec/score/cpu/m68k')
-rw-r--r--c/src/exec/score/cpu/m68k/cpu_asm.s8
1 files changed, 5 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/m68k/cpu_asm.s b/c/src/exec/score/cpu/m68k/cpu_asm.s
index b288c9f2bb..15985cf1ad 100644
--- a/c/src/exec/score/cpu/m68k/cpu_asm.s
+++ b/c/src/exec/score/cpu/m68k/cpu_asm.s
@@ -202,9 +202,11 @@ bframe: clrl SYM (_ISR_Signals_to_thread_executing)
movec a0,msp | set master stack pointer
#else
- movew a7@(16+SR_OFFSET),sr
- jsr SYM (_Thread_Dispatch)
-
+| filter out the trace bit to stop single step debugging breaking
+ movew a7@(16+SR_OFFSET),d0
+ andw #0x7FFF,d0
+ movew d0,sr
+ jsr SYM (_Thread_Dispatch)
#endif
exit: moveml a7@+,d0-d1/a0-a1 | restore d0-d1,a0-a1