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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-08-01 20:01:14 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-08-01 20:01:14 +0000
commitb812f841553be30baab45f08b3f6fda692b5166b (patch)
treeb3dc6aeca3a4ced907f1c0262f9a714b44d3baab /c/ACKNOWLEDGEMENTS
parent499d443996fc62aedd4b9134f59c06b7de105417 (diff)
downloadrtems-b812f841553be30baab45f08b3f6fda692b5166b.tar.bz2
Added sim68000 BSP for the BSVC simulator. This BSP includes the
alias simcpu32 that supports the CPU32 simulator in BSVC. At this point, it is still under development.
Diffstat (limited to 'c/ACKNOWLEDGEMENTS')
-rw-r--r--c/ACKNOWLEDGEMENTS6
1 files changed, 4 insertions, 2 deletions
diff --git a/c/ACKNOWLEDGEMENTS b/c/ACKNOWLEDGEMENTS
index a459083443..294cb75d45 100644
--- a/c/ACKNOWLEDGEMENTS
+++ b/c/ACKNOWLEDGEMENTS
@@ -168,8 +168,10 @@ The following persons/organizations have made contributions:
+ Mark Bronson <mark@ramix.com> of RAMIX for submitting i960RP
support and the rxgen960 board support package.
-+ Joel Sherrill <joel@OARcorp.com> for the i960sim BSP that works
- with the i960 instruction set simulator in gdb.
++ Joel Sherrill <joel@OARcorp.com> for the BSPs that work with
+ numerous simulators including psim, i960sim, c4xsim, h8sim, armulator,
+ sim68000, and simcpu32. Most of these BSPs work with instruction
+ set simulators in gdb.
+ Darlene Stewart <Darlene.Stewart@nrc.ca> and Charles Gauthier
<Charles.Gauthier@nrc.ca> of the Institute for Information Technology