diff options
| author | Stanislav Pankevich <stanislav@reflexaerospace.com> | 2024-03-19 10:34:57 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-03-19 13:25:16 +0100 |
| commit | ef9a74fc1a2ad5a528e94e6bf54f5c1f61c116f5 (patch) | |
| tree | d177ab1ae1dffa1d5e427585486b0d001126e06f /bsps | |
| parent | cpukit: Gate ticks per timeslice config (diff) | |
| download | rtems-ef9a74fc1a2ad5a528e94e6bf54f5c1f61c116f5.tar.bz2 | |
arm/xilinx-zynqmp-rpu: Fix clock driver
We observed a strange behavior of the 1Hz timer when running cFS on Zynq
RPU. After some investigation, we reduced the error to the truncation
issue. This patch fixes the issue.
Diffstat (limited to 'bsps')
| -rw-r--r-- | bsps/shared/dev/clock/xil-ttc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bsps/shared/dev/clock/xil-ttc.c b/bsps/shared/dev/clock/xil-ttc.c index 2c47684045..5121773a6f 100644 --- a/bsps/shared/dev/clock/xil-ttc.c +++ b/bsps/shared/dev/clock/xil-ttc.c @@ -126,7 +126,7 @@ static void zynqmp_ttc_clock_driver_support_initialize_hardware(void) /* Setup match register to generate tick IRQ */ ttc_clock_instance.irq_match_interval = - (uint32_t) ((frequency * microsec_per_tick) / 1000000); + (uint32_t) (((uint64_t)frequency * microsec_per_tick) / 1000000); XTtcPs_WriteReg(BSP_SELECTED_TTC_ADDR, XTTCPS_MATCH_0_OFFSET, ttc_clock_instance.irq_match_interval); /* Clear interupts (clear on read) */ |