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| author | Tyler Miller <tyler.miller@airbusus.com> | 2023-12-21 15:16:48 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-01-15 10:33:36 +0100 |
| commit | ec79400503ab196ea1a668badfb569fcc7917fdc (patch) | |
| tree | 2bf638a235ee2561cfc586fecaedb5dfa5f33b06 /bsps | |
| parent | bsp/tms570: TMS570LC4x Errata DEVICE#60 (diff) | |
| download | rtems-ec79400503ab196ea1a668badfb569fcc7917fdc.tar.bz2 | |
bsp/tms570: Add HCLKCNTL register
Update #4982.
Diffstat (limited to 'bsps')
| -rw-r--r-- | bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h index 8bc72c6083..47808d8483 100644 --- a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h +++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h @@ -60,9 +60,11 @@ typedef struct{ uint8_t reserved3 [20]; uint32_t CLK2CNTRL; /*Clock 2 Control Register*/ uint32_t VCLKACON1; /*Peripheral Asynchronous Clock Configuration 1 Register*/ - uint8_t reserved4 [44]; + uint8_t reserved4 [16]; + uint32_t HCLKCNTL; /* 0x0054 */ + uint8_t reserved5 [24]; uint32_t CLKSLIP; /*Clock Slip Register*/ - uint8_t reserved5 [120]; + uint8_t reserved6 [120]; uint32_t EFC_CTLREG; /*EFUSE Controller Control Register*/ uint32_t DIEDL_REG0; /*Die Identification Register*/ uint32_t DIEDH_REG1; /*Die Identification Register*/ |