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authorSebastian Huber <sebastian.huber@embedded-brains.de>2019-04-09 10:58:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-04-12 09:44:48 +0200
commitdf8d7bd76f5014583d6cc20f72f335e5fe2bd0cc (patch)
tree3d029b3875e7a9bfadd04f00d16557da14c151f1 /bsps
parentscore: Use an ISR lock for Per_CPU_Control::Lock (diff)
downloadrtems-df8d7bd76f5014583d6cc20f72f335e5fe2bd0cc.tar.bz2
score: Use processor mask in _SMP_Multicast_action
Processor_mask is the internal data type to deal with processor sets.
Diffstat (limited to 'bsps')
-rw-r--r--bsps/shared/cache/cacheimpl.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/bsps/shared/cache/cacheimpl.h b/bsps/shared/cache/cacheimpl.h
index cb7f02d4ec..dbed9c8a19 100644
--- a/bsps/shared/cache/cacheimpl.h
+++ b/bsps/shared/cache/cacheimpl.h
@@ -329,7 +329,7 @@ rtems_cache_invalidate_multiple_instruction_lines(
#if defined(RTEMS_SMP) && defined(CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING)
smp_cache_area area = { i_addr, n_bytes };
- _SMP_Multicast_action( 0, NULL, smp_cache_inst_inv, &area );
+ _SMP_Multicast_action( NULL, smp_cache_inst_inv, &area );
#else
_CPU_cache_invalidate_instruction_range( i_addr, n_bytes );
#endif
@@ -345,7 +345,7 @@ rtems_cache_invalidate_entire_instruction( void )
{
#if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT)
#if defined(RTEMS_SMP) && defined(CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING)
- _SMP_Multicast_action( 0, NULL, smp_cache_inst_inv_all, NULL );
+ _SMP_Multicast_action( NULL, smp_cache_inst_inv_all, NULL );
#else
_CPU_cache_invalidate_entire_instruction();
#endif