bsp/altera-cyclone-v: Adjust Doxygen groups

Update #3706

6 files changed, 43 insertions, 48 deletions

diff --git a/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h b/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
index 529d19980f..1c23cbc1f2 100644
--- a/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
+++ b/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
@@ -1,10 +1,7 @@
 /**
  * @file
  *
- * @ingroup altera-cyclone-v_i2c
- *
- * @brief Drivers for I2C
- *
+ * @ingroup RTEMSBSPsARMCycVI2C
  */
 
 /*
diff --git a/bsps/arm/altera-cyclone-v/include/bsp.h b/bsps/arm/altera-cyclone-v/include/bsp.h
index e3fdbab233..6d2156a235 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp.h
@@ -1,9 +1,7 @@
 /**
  * @file
  *
- * @ingroup arm_altera-cyclone-v
- *
- * @brief Global BSP definitions.
+ * @ingroup RTEMSBSPsARMCycV
  */
 
 /*
@@ -23,6 +21,16 @@
 #ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
 #define LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
 
+/**
+ * @defgroup RTEMSBSPsARMCycV Intel Cyclone V
+ *
+ * @ingroup RTEMSBSPsARM
+ *
+ * @brief Intel Cyclone V Board Support Package.
+ *
+ * @{
+ */
+
 #include <bspopts.h>
 
 #define BSP_FEATURE_IRQ_EXTENSION
@@ -63,14 +71,6 @@ extern uint32_t altera_cyclone_v_a9mpcore_periphclk;
 
 #endif /* ASM */
 
-#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */
+/* @} */
 
-/**
- * @defgroup arm_altera-cyclone-v Altera Cyclone V Support
- *
- * @ingroup bsp_arm
- *
- * @brief Altera Cyclone V support package.
- *
- * @{
- */
+#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h b/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
index 8aad5d7b32..2d0e978f3e 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
@@ -1,9 +1,7 @@
 /**
  * @file
  *
- * @ingroup altera-cyclone-v_hwlib
- *
- * @brief The type definition for status codes returned by the HWLIB.
+ * @ingroup RTEMSBSPsARMCycVContrib
  */
 
 /******************************************************************************
@@ -57,11 +55,11 @@ extern "C"
 #endif  /* __cplusplus */
 
 /**
- * @defgroup altera-cyclone-v_hwlib Hwlib
+ * @defgroup RTEMSBSPsARMCycVContrib Contributed Code
  *
- * @ingroup arm_altera-cyclone-v
+ * @ingroup RTEMSBSPsARMCycV
  *
- * @brief The type definition for status codes returned by the HWLIB.
+ * @brief Contributed code from Altera.
  */
 
 /*!
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h b/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
index 114d8a6219..c80e5c37dd 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
@@ -1,9 +1,7 @@
 /**
  * @file
  *
- * @ingroup altera-cyclone-v_i2c
- *
- * @brief Drivers for I2C
+ * @ingroup RTEMSBSPsARMCycVI2C
  */
 
 /*
@@ -30,12 +28,13 @@ extern "C" {
 #endif /* __cplusplus */
 
 /**
- * @defgroup altera-cyclone-v_i2c I2C Support
+ * @defgroup RTEMSBSPsARMCycVI2C I2C Driver
  *
- * @ingroup arm_altera-cyclone-v
+ * @ingroup RTEMSBSPsARMCycV
  *
- * @brief I2C Support
+ * @brief I2C Driver.
  *
+ * @{
  */
 
 rtems_device_driver i2cdrv_initialize(
@@ -86,6 +85,8 @@ rtems_device_driver i2cdrv_ioctl(
 
 #define I2C_IOC_SET_SLAVE_ADDRESS 1
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/irq.h b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
index ad0e4dfd61..4247d01747 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/irq.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
@@ -1,9 +1,7 @@
 /**
  * @file
  *
- * @ingroup altera-cyclone-v_interrupt
- *
- * @brief Interrupt definitions.
+ * @ingroup RTEMSBSPsARMCycVIRQ
  */
 
 /*
@@ -37,13 +35,13 @@ extern "C" {
 #endif /* __cplusplus */
 
 /**
- * @defgroup altera-cyclone-v_interrupt Interrupt Support
+ * @defgroup RTEMSBSPsARMCycVIRQ Interrupt Support
  *
- * @ingroup arm_altera-cyclone-v
+ * @ingroup RTEMSBSPsARMCycV
  *
  * @ingroup bsp_interrupt
  *
- * @brief Interrupt Support for Altera Cyclone V
+ * @brief Intel Cyclone V Interrupt Support.
  *
  * @{
  */
@@ -52,6 +50,8 @@ extern "C" {
 #define BSP_INTERRUPT_VECTOR_MIN ALT_INT_INTERRUPT_SGI0
 #define BSP_INTERRUPT_VECTOR_MAX ALT_INT_INTERRUPT_RAM_ECC_UNCORRECTED_IRQ
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/bsps/arm/altera-cyclone-v/include/tm27.h b/bsps/arm/altera-cyclone-v/include/tm27.h
index 35f8cf0676..23019a539a 100644
--- a/bsps/arm/altera-cyclone-v/include/tm27.h
+++ b/bsps/arm/altera-cyclone-v/include/tm27.h
@@ -1,18 +1,7 @@
 /**
-  * @file
-  *
-  * @ingroup altera-cyclone-v_tm27
-  *
-  * @brief GIC tmtests/tm27 support.
-  */
-
-
-/**
- * @defgroup altera-cyclone-v_tm27 GIC tmtests/tm27
+ * @file
  *
- * @ingroup arm_altera-cyclone-v
- *
- * @brief GIC tmtests/tm27 support.
+ * @ingroup RTEMSBSPsARMCycTM27
  */
 
 /*
@@ -36,6 +25,16 @@
 #ifndef __tm27_h
 #define __tm27_h
 
+/**
+ * @defgroup RTEMSBSPsARMCycTM27 TM27 Support
+ *
+ * @ingroup RTEMSBSPsARMCycV
+ *
+ * @brief Intel Cyclone V TM27 Support.
+ */
+
 #include <bsp/arm-gic-tm27.h>
 
+/** @} */
+
 #endif /* __tm27_h */