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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-25 10:33:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-25 11:02:24 +0200
commit4183b71141833ba2b5822a2adc7625cda2f61eaa (patch)
tree811e3ec9e0e6049e7fa814cd5bfed9e4699d9836 /bsps
parentbsp/mcf5206elite: Move nvram.c to bsps (diff)
downloadrtems-4183b71141833ba2b5822a2adc7625cda2f61eaa.tar.bz2
bsp/tms570: Move cpucounterread.c to bsps
This patch is a part of the BSP source reorganization. Update #3285.
Diffstat (limited to 'bsps')
-rw-r--r--bsps/arm/tms570/cpucounter/cpucounterread.c62
1 files changed, 62 insertions, 0 deletions
diff --git a/bsps/arm/tms570/cpucounter/cpucounterread.c b/bsps/arm/tms570/cpucounter/cpucounterread.c
new file mode 100644
index 0000000000..c5e62d382d
--- /dev/null
+++ b/bsps/arm/tms570/cpucounter/cpucounterread.c
@@ -0,0 +1,62 @@
+/**
+ * @file
+ *
+ * @ingroup tms570_clocks
+ *
+ * @brief Cortex-R performace counters
+ *
+ * The counters setup functions are these which has been suggested
+ * on StackOverflow
+ *
+ * Code is probably for use on Cortex-A without modifications as well.
+ *
+ * http://stackoverflow.com/questions/3247373/how-to-measure-program-execution-time-in-arm-cortex-a8-processor
+ */
+
+/*
+ * Copyright (c) 2014 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ *
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/counter.h>
+#include <rtems/sysinit.h>
+
+#include <libcpu/arm-cp15.h>
+
+#include <bsp.h>
+
+static void tms570_cpu_counter_initialize(void)
+{
+ uint32_t cycle_counter;
+ uint32_t pmcr;
+
+ cycle_counter = ARM_CP15_PMCLRSET_CYCLE_COUNTER;
+ arm_cp15_set_performance_monitors_interrupt_enable_clear(cycle_counter);
+ arm_cp15_set_performance_monitors_count_enable_set(cycle_counter);
+
+ pmcr = arm_cp15_get_performance_monitors_control();
+ pmcr &= ~ARM_CP15_PMCR_D;
+ pmcr |= ARM_CP15_PMCR_E;
+ arm_cp15_set_performance_monitors_control(pmcr);
+
+ rtems_counter_initialize_converter(2 * BSP_PLL_OUT_CLOCK);
+}
+
+CPU_Counter_ticks _CPU_Counter_read(void)
+{
+ return arm_cp15_get_performance_monitors_cycle_count();
+}
+
+RTEMS_SYSINIT_ITEM(
+ tms570_cpu_counter_initialize,
+ RTEMS_SYSINIT_BSP_START,
+ RTEMS_SYSINIT_ORDER_FIRST
+);