diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-03-11 14:18:46 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-03-11 14:22:53 +0100 |
| commit | 283f783d5d884c0f0f823c5f2d24ebaa97624d88 (patch) | |
| tree | ce2c484326bbae08ee5be736fadb98e7b7990b62 /bsps | |
| parent | bsps/powerpc: Fix include order (diff) | |
| download | rtems-283f783d5d884c0f0f823c5f2d24ebaa97624d88.tar.bz2 | |
aarch64/zynqmp: Fix UART base addresses and IRQ
The base addresses and IRQ numbers for UART 0 and 1 were interchanged.
Fix this and set BSP_CONSOLE_MINOR to 0 for this BSP family.
Diffstat (limited to 'bsps')
| -rw-r--r-- | bsps/aarch64/xilinx-zynqmp/console/console.c | 4 | ||||
| -rw-r--r-- | bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c b/bsps/aarch64/xilinx-zynqmp/console/console.c index 0b62893e67..9ce0b1da63 100644 --- a/bsps/aarch64/xilinx-zynqmp/console/console.c +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c @@ -187,11 +187,11 @@ RTEMS_SYSINIT_ITEM( static zynq_uart_context zynqmp_uart_instances[2] = { { .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), - .regs = (volatile struct zynq_uart *) 0xff010000, + .regs = (volatile struct zynq_uart *) 0xff000000, .irq = ZYNQMP_IRQ_UART_0 }, { .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), - .regs = (volatile struct zynq_uart *) 0xff000000, + .regs = (volatile struct zynq_uart *) 0xff010000, .irq = ZYNQMP_IRQ_UART_1 } }; diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h b/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h index 2cbe99f863..024fd0d89a 100644 --- a/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h @@ -56,8 +56,8 @@ extern "C" { #define ZYNQMP_IRQ_QSPI 47 #define ZYNQMP_IRQ_I2C_0 49 #define ZYNQMP_IRQ_I2C_1 50 -#define ZYNQMP_IRQ_UART_0 54 -#define ZYNQMP_IRQ_UART_1 53 +#define ZYNQMP_IRQ_UART_0 53 +#define ZYNQMP_IRQ_UART_1 54 #define ZYNQMP_IRQ_ETHERNET_0 89 #define ZYNQMP_IRQ_ETHERNET_1 91 #define ZYNQMP_IRQ_ETHERNET_2 93 |