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author | Amaan Cheval <amaan.cheval@gmail.com> | 2018-08-13 16:03:12 +0530 |
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committer | Joel Sherrill <joel@rtems.org> | 2018-08-13 10:48:20 -0500 |
commit | 4544749e3c163c511a9a28992b3ac429515c0a5a (patch) | |
tree | 34043f7607ab3931634efa12da7b1f922cda4479 /bsps/x86_64/include/libcpu/page.h | |
parent | bsps/x86_64: Reduce default RamSize to 1GiB (diff) | |
download | rtems-4544749e3c163c511a9a28992b3ac429515c0a5a.tar.bz2 |
bsps/x86_64: Add paging support with 1GiB super pages
Updates #2898.
Diffstat (limited to 'bsps/x86_64/include/libcpu/page.h')
-rw-r--r-- | bsps/x86_64/include/libcpu/page.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/bsps/x86_64/include/libcpu/page.h b/bsps/x86_64/include/libcpu/page.h new file mode 100644 index 0000000000..1903ae975e --- /dev/null +++ b/bsps/x86_64/include/libcpu/page.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2018. + * Amaan Cheval <amaan.cheval@gmail.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _LIBCPU_AMD64_PAGE_H +#define _LIBCPU_AMD64_PAGE_H + +#ifndef ASM + +#define NUM_PAGE_TABLE_ENTRIES 512 + +extern uint64_t amd64_pml4[NUM_PAGE_TABLE_ENTRIES]; +extern uint64_t amd64_pdpt[NUM_PAGE_TABLE_ENTRIES]; + +bool paging_1gib_pages_supported(void); +uint8_t get_maxphysaddr(void); +uint64_t get_mask_for_bits(uint8_t start, uint8_t end); +uint64_t create_cr3_entry( + uint64_t phys_addr, uint8_t maxphysaddr, uint64_t flags +); +uint64_t create_pml4_entry( + uint64_t phys_addr, uint8_t maxphysaddr, uint64_t flags +); +uint64_t create_pdpt_entry( + uint64_t phys_addr, uint8_t maxphysaddr, uint64_t flags +); + +void paging_init(void); + +#define PAGE_FLAGS_PRESENT (1 << 0) +#define PAGE_FLAGS_WRITABLE (1 << 1) +#define PAGE_FLAGS_USER_ACCESSIBLE (1 << 2) +#define PAGE_FLAGS_WRITE_THROUGH (1 << 3) +#define PAGE_FLAGS_NO_CACHE (1 << 4) +#define PAGE_FLAGS_ACCESSED (1 << 5) +#define PAGE_FLAGS_DIRTY (1 << 6) +#define PAGE_FLAGS_HUGE_PAGE (1 << 7) +#define PAGE_FLAGS_GLOBAL (1 << 8) +#define PAGE_FLAGS_NO_EXECUTE (1 << 63) + +#define PAGE_FLAGS_DEFAULTS \ + (PAGE_FLAGS_PRESENT | PAGE_FLAGS_WRITABLE | PAGE_FLAGS_USER_ACCESSIBLE \ + | PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_NO_CACHE | PAGE_FLAGS_GLOBAL) + +#endif /* !ASM */ +#endif |