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authorSebastian Huber <sebastian.huber@embedded-brains.de>2021-07-16 10:35:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2023-07-14 12:21:33 +0200
commitfc97810ce3dd0575bac10af31974dda9e8e4cbff (patch)
treeeefa6ddd3a77d2a2396a2e59df8b38e6e3e7e2c2 /bsps/sparc
parentbsp/leon3: Use new L2CACHE register block API (diff)
downloadrtems-fc97810ce3dd0575bac10af31974dda9e8e4cbff.tar.bz2
bsp/leon3: Add LEON3_APBUART_BASE
Diffstat (limited to 'bsps/sparc')
-rw-r--r--bsps/sparc/leon3/console/printk_support.c37
-rw-r--r--bsps/sparc/leon3/include/bsp/leon3.h5
-rw-r--r--bsps/sparc/leon3/include/leon.h2
3 files changed, 36 insertions, 8 deletions
diff --git a/bsps/sparc/leon3/console/printk_support.c b/bsps/sparc/leon3/console/printk_support.c
index cb77c66a96..9e260d2eac 100644
--- a/bsps/sparc/leon3/console/printk_support.c
+++ b/bsps/sparc/leon3/console/printk_support.c
@@ -38,20 +38,27 @@
#include <bsp/leon3.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
-#include <rtems/score/thread.h>
#include <grlib/apbuart.h>
#include <grlib/io.h>
+#if !defined(LEON3_APBUART_BASE)
#include <grlib/ambapp.h>
int leon3_debug_uart_index __attribute__((weak)) = 0;
+
apbuart *leon3_debug_uart = NULL;
+#endif
static void bsp_debug_uart_init(void);
-static void bsp_debug_uart_discard(char c)
+static void apbuart_enable_receive_and_transmit(apbuart *regs)
{
- (void) c;
+ uint32_t ctrl;
+
+ ctrl = grlib_load_32(&regs->ctrl);
+ ctrl |= APBUART_CTRL_RE | APBUART_CTRL_TE;
+ grlib_store_32(&regs->ctrl, ctrl);
+ grlib_store_32(&regs->status, 0);
}
static void bsp_debug_uart_output_char(char c)
@@ -71,6 +78,22 @@ static void bsp_debug_uart_pre_init_out(char c)
(*BSP_output_char)(c);
}
+#if defined(LEON3_APBUART_BASE)
+
+static void bsp_debug_uart_init(void)
+{
+ apbuart_enable_receive_and_transmit(leon3_debug_uart);
+ BSP_poll_char = bsp_debug_uart_poll_char;
+ BSP_output_char = bsp_debug_uart_output_char;
+}
+
+#else /* !LEON3_APBUART_BASE */
+
+static void bsp_debug_uart_discard(char c)
+{
+ (void) c;
+}
+
/* Initialize the BSP system debug console layer. It will scan AMBA Plu&Play
* for a debug APBUART and enable RX/TX for that UART.
*/
@@ -108,7 +131,6 @@ static void bsp_debug_uart_init(void)
ambapp_find_by_idx, (void *)&i);
if (adev != NULL) {
struct ambapp_apb_info *apb;
- uint32_t ctrl;
/*
* Found a matching debug console, initialize debug UART if present for
@@ -116,16 +138,15 @@ static void bsp_debug_uart_init(void)
*/
apb = (struct ambapp_apb_info *)adev->devinfo;
leon3_debug_uart = (apbuart *)apb->start;
- ctrl = grlib_load_32(&leon3_debug_uart->ctrl);
- ctrl |= APBUART_CTRL_RE | APBUART_CTRL_TE;
- grlib_store_32(&leon3_debug_uart->ctrl, ctrl);
- grlib_store_32(&leon3_debug_uart->status, 0);
+ apbuart_enable_receive_and_transmit(leon3_debug_uart);
BSP_poll_char = bsp_debug_uart_poll_char;
BSP_output_char = bsp_debug_uart_output_char;
}
}
+#endif /* LEON3_APBUART_BASE */
+
RTEMS_SYSINIT_ITEM(
bsp_debug_uart_init,
RTEMS_SYSINIT_BSP_START,
diff --git a/bsps/sparc/leon3/include/bsp/leon3.h b/bsps/sparc/leon3/include/bsp/leon3.h
index aa3898e530..1402dfca1b 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -39,6 +39,7 @@
#include <grlib/apbuart-regs.h>
#include <grlib/gptimer-regs.h>
+#include <bspopts.h>
#include <bsp/irqimpl.h>
#include <grlib/ambapp.h>
@@ -266,7 +267,11 @@ static inline uint32_t leon3_up_counter_frequency( void )
/**
* @brief This pointer provides the debug APBUART register block address.
*/
+#if defined(LEON3_APBUART_BASE)
+#define leon3_debug_uart ((struct apbuart *) LEON3_APBUART_BASE)
+#else
extern apbuart *leon3_debug_uart;
+#endif
/** @} */
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index f5f6fa84e4..fba64addfe 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -329,6 +329,7 @@ static inline unsigned int leon_r32_no_cache(uintptr_t addr)
*/
extern int syscon_uart_index;
+#if !defined(LEON3_APBUART_BASE)
/* Let user override which on-chip APBUART will be debug UART
* 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
* 1 = APBUART[0]
@@ -337,6 +338,7 @@ extern int syscon_uart_index;
* ...
*/
extern int leon3_debug_uart_index;
+#endif
/* Let user override which on-chip TIMER core will be used for system clock
* timer. This controls which timer core will be accociated with