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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-01 08:27:11 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-12-13 07:32:58 +0100 |
commit | f44e2c99ccddfea7135dcf168d0d3cf8a4ee3180 (patch) | |
tree | b300faea8b3da22d827f30fd0524168a64d5cedb /bsps/sparc | |
parent | bsp/leon3: Use interrupt entry for tm27 support (diff) | |
download | rtems-f44e2c99ccddfea7135dcf168d0d3cf8a4ee3180.tar.bz2 |
bsp/leon3: Do not invalidate cache in SMP start
Since the trap table is now statically initialized, there is no need to
invalidate the instruction cache.
Diffstat (limited to 'bsps/sparc')
-rw-r--r-- | bsps/sparc/leon3/start/bspsmp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bsps/sparc/leon3/start/bspsmp.c b/bsps/sparc/leon3/start/bspsmp.c index 74f9df5404..acd932843a 100644 --- a/bsps/sparc/leon3/start/bspsmp.c +++ b/bsps/sparc/leon3/start/bspsmp.c @@ -105,7 +105,7 @@ void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) void _CPU_SMP_Prepare_start_multitasking( void ) { - rtems_cache_invalidate_entire_instruction(); + /* Do nothing */ } void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) |