bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

37 files changed, 2193 insertions, 0 deletions

diff --git a/bsps/sparc/erc32/start/boardinit.S b/bsps/sparc/erc32/start/boardinit.S
new file mode 100644
index 0000000000..9ced1c3639
--- /dev/null
+++ b/bsps/sparc/erc32/start/boardinit.S
@@ -0,0 +1,92 @@
+/**
+ * @file
+ *
+ * @ingroup sparc_erc32
+ *
+ * @brief Initialise various ERC32 registers
+ */
+
+/*
+ *  COPYRIGHT (c) 2000.
+ *  European Space Agency.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/asm.h>
+#include <erc32.h>
+
+        .global __bsp_board_init
+__bsp_board_init:
+
+/* Check if MEC is initialised. If not, this means that we are
+   running on the simulator. Initiate some of the parameters
+   that are done by the boot-prom otherwise.
+*/
+
+        set     SYM(ERC32_MEC), %g3  ! g3 = base address of peripherals
+	ld	[%g3], %g2
+	set	0xfe080000, %g1
+	andcc	%g1, %g2, %g0
+ 	bne	2f
+
+ /* Stop the watchdog */
+
+	st	%g0, [%g3 + SYM(ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET)]
+
+ /* Set zero waitstates */
+
+	st	%g0, [%g3 + SYM(ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET)]
+
+ /* Set the correct memory size in MEC memory config register */
+
+ 	set	SYM(PROM_SIZE), %l0
+ 	set	0, %l1
+ 	srl	%l0, 18, %l0
+1:
+ 	tst	%l0
+ 	srl	%l0, 1, %l0
+ 	bne,a	1b
+ 	inc	%l1
+ 	sll	%l1, 8, %l1
+
+ 	set	SYM(RAM_SIZE), %l0
+ 	srl	%l0, 19, %l0
+1:
+ 	tst	%l0
+ 	srl	%l0, 1, %l0
+ 	bne,a	1b
+ 	inc	%l1
+ 	sll	%l1, 10, %l1
+
+                                           ! set the Memory Configuration
+        st     %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
+
+ 	set	SYM(RAM_START), %l1  ! Cannot use RAM_END due to bug in linker
+ 	set	SYM(RAM_SIZE), %l2
+ 	add	%l1, %l2, %sp
+
+	set	SYM(CLOCK_SPEED), %g6	! Use 14 MHz in simulator
+	set	14, %g1
+	st	%g1, [%g6]
+
+2:
+
+ /* Initialise timer */
+
+ 	set	SYM(_ERC32_MEC_Timer_Control_Mirror), %l2
+	st	%g0, [%l2]
+	st	%g0, [%g3 + SYM(ERC32_MEC_TIMER_CONTROL_OFFSET)]
+
+ /* Enable power-down */
+
+	ld	[%g3 + SYM(ERC32_MEC_CONTROL_OFFSET)], %l2
+	or	%l2, ERC32_CONFIGURATION_POWER_DOWN_ALLOWED, %l2
+	st	%l2, [%g3 + SYM(ERC32_MEC_CONTROL_OFFSET)]
+
+	retl
+	nop
+
+/* end of file */
diff --git a/bsps/sparc/erc32/start/bsp_specs b/bsps/sparc/erc32/start/bsp_specs
new file mode 100644
index 0000000000..87638cc027
--- /dev/null
+++ b/bsps/sparc/erc32/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/sparc/erc32/start/bspdelay.c b/bsps/sparc/erc32/start/bspdelay.c
new file mode 100644
index 0000000000..afd42cbd6f
--- /dev/null
+++ b/bsps/sparc/erc32/start/bspdelay.c
@@ -0,0 +1,25 @@
+/*
+ *  ERC32 BSP Delay Method
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2014.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+void rtems_bsp_delay(int usecs)
+{
+  uint32_t then;
+
+  then  = ERC32_MEC.Real_Time_Clock_Counter;
+  then += usecs;
+
+  while (ERC32_MEC.Real_Time_Clock_Counter >= then)
+    ;
+}
diff --git a/bsps/sparc/erc32/start/bspidle.c b/bsps/sparc/erc32/start/bspidle.c
new file mode 100644
index 0000000000..4b41625e84
--- /dev/null
+++ b/bsps/sparc/erc32/start/bspidle.c
@@ -0,0 +1,27 @@
+/*
+ *  ERC32 Idle Thread with power-down function
+ *
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to ERC32 implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+
+void *bsp_idle_thread( uintptr_t ignored )
+{
+  while (1) {
+    ERC32_MEC.Power_Down = 0;   /* value is irrelevant */
+  }
+  return NULL;
+}
diff --git a/bsps/sparc/erc32/start/erc32mec.c b/bsps/sparc/erc32/start/erc32mec.c
new file mode 100644
index 0000000000..7b0ccbd309
--- /dev/null
+++ b/bsps/sparc/erc32/start/erc32mec.c
@@ -0,0 +1,15 @@
+/*
+ *  Put this variable in a separate file so it is only linked in when needed.
+ *
+ *  COPYRIGHT (c) 1989-2002.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+ERC32_Register_Map ERC32_MEC;
diff --git a/bsps/sparc/erc32/start/linkcmds b/bsps/sparc/erc32/start/linkcmds
new file mode 100644
index 0000000000..9df3a0d94f
--- /dev/null
+++ b/bsps/sparc/erc32/start/linkcmds
@@ -0,0 +1,29 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x02000000;
+
+/*
+ *  Base address of the on-CPU peripherals
+ */
+
+_ERC32_MEC = 0x01f80000;
+ERC32_MEC = _ERC32_MEC;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 16
+  ram     : ORIGIN = 0x02000000, LENGTH = 32M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/erc32/start/setvec.c b/bsps/sparc/erc32/start/setvec.c
new file mode 100644
index 0000000000..d3aa8ed72f
--- /dev/null
+++ b/bsps/sparc/erc32/start/setvec.c
@@ -0,0 +1,59 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the SPARC simulator.
+ *
+ *  INPUT PARAMETERS:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  OUTPUT PARAMETERS:  NONE
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to ERC32 implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+
+rtems_isr_entry set_vector(                   /* returns old vector */
+  rtems_isr_entry     handler,                /* isr routine        */
+  rtems_vector_number vector,                 /* vector number      */
+  int                 type                    /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+  uint32_t        real_trap;
+  uint32_t        source;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, &previous_isr );
+  else
+    _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
+
+  real_trap = SPARC_REAL_TRAP_NUMBER( vector );
+
+  if ( ERC32_Is_MEC_Trap( real_trap ) ) {
+
+    source = ERC32_TRAP_SOURCE( real_trap );
+
+    ERC32_Clear_interrupt( source );
+    ERC32_Unmask_interrupt( source );
+  }
+
+  return previous_isr;
+}
diff --git a/bsps/sparc/erc32/start/spurious.c b/bsps/sparc/erc32/start/spurious.c
new file mode 100644
index 0000000000..b022f96f5c
--- /dev/null
+++ b/bsps/sparc/erc32/start/spurious.c
@@ -0,0 +1,194 @@
+/*
+ *  ERC32 Spurious Trap Handler
+ *
+ *  This is just enough of a trap handler to let us know what
+ *  the likely source of the trap was.
+ *
+ *  Developed as part of the port of RTEMS to the ERC32 implementation
+ *  of the SPARC by On-Line Applications Research Corporation (OAR)
+ *  under contract to the European Space Agency (ESA).
+ *
+ *  COPYRIGHT (c) 1995. European Space Agency.
+ *
+ *  This terms of the RTEMS license apply to this file.
+ */
+
+#include <bsp.h>
+#include <rtems/bspIo.h>
+#include <inttypes.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+  uint32_t                   trap;
+  uint32_t                   real_trap;
+  const CPU_Interrupt_frame *isf;
+
+  trap = frame->trap;
+  real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+  isf = frame->isf;
+
+  printk(
+    "Unexpected trap (%2" PRId32 ") at address 0x%08" PRIx32 "\n",
+    real_trap,
+    isf->tpc
+  );
+
+  switch (real_trap) {
+
+    /*
+     *  First the ones defined by the basic architecture
+     */
+
+    case 0x00:
+      printk( "reset\n" );
+      break;
+    case 0x01:
+      printk( "instruction access exception\n" );
+      break;
+    case 0x02:
+      printk( "illegal instruction\n" );
+      break;
+    case 0x03:
+      printk( "privileged instruction\n" );
+      break;
+    case 0x04:
+      printk( "fp disabled\n" );
+      break;
+    case 0x07:
+      printk( "memory address not aligned\n" );
+      break;
+    case 0x08:
+      printk( "fp exception\n" );
+      break;
+    case 0x09:
+      printk("data access exception at 0x%08" PRIx32 "\n",
+        ERC32_MEC.First_Failing_Address );
+      break;
+    case 0x0A:
+      printk( "tag overflow\n" );
+      break;
+
+    /*
+     *  Then the ones defined by the ERC32 in particular
+     */
+
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_MASKED_ERRORS ):
+      printk( "ERC32_INTERRUPT_MASKED_ERRORS\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_1 ):
+      printk( "ERC32_INTERRUPT_EXTERNAL_1\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_2 ):
+      printk( "ERC32_INTERRUPT_EXTERNAL_2\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_A_RX_TX ):
+      printk( "ERC32_INTERRUPT_UART_A_RX_TX\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_B_RX_TX ):
+      printk( "ERC32_INTERRUPT_UART_A_RX_TX\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR ):
+      printk( "ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_ERROR ):
+      printk( "ERC32_INTERRUPT_UART_ERROR\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_ACCESS_ERROR ):
+      printk( "ERC32_INTERRUPT_DMA_ACCESS_ERROR\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_TIMEOUT ):
+      printk( "ERC32_INTERRUPT_DMA_TIMEOUT\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_3 ):
+      printk( "ERC32_INTERRUPT_EXTERNAL_3\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_4 ):
+      printk( "ERC32_INTERRUPT_EXTERNAL_4\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER ):
+      printk( "ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_REAL_TIME_CLOCK ):
+      printk( "ERC32_INTERRUPT_REAL_TIME_CLOCK\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_5 ):
+      printk( "ERC32_INTERRUPT_EXTERNAL_5\n" );
+      break;
+    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_WATCHDOG_TIMEOUT ):
+      printk( "ERC32_INTERRUPT_WATCHDOG_TIMEOUT\n" );
+      break;
+
+    default:
+      break;
+  }
+}
+
+static rtems_isr bsp_spurious_handler(
+   rtems_vector_number trap,
+   CPU_Interrupt_frame *isf
+)
+{
+  CPU_Exception_frame frame = {
+    .trap = trap,
+    .isf = isf
+  };
+
+#if !defined(SPARC_USE_LAZY_FP_SWITCH)
+  if ( SPARC_REAL_TRAP_NUMBER( trap ) == 4 ) {
+    _Internal_error( INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT );
+  }
+#endif
+
+  rtems_fatal(
+    RTEMS_FATAL_SOURCE_EXCEPTION,
+    (rtems_fatal_code) &frame
+  );
+}
+
+/*
+ *  bsp_spurious_initialize
+ *
+ *  Install the spurious handler for most traps. Note that set_vector()
+ *  will unmask the corresponding asynchronous interrupt, so the initial
+ *  interrupt mask is restored after the handlers are installed.
+ */
+
+void bsp_spurious_initialize()
+{
+  uint32_t   trap;
+  uint32_t   level = 15;
+  uint32_t   mask;
+
+  level = sparc_disable_interrupts();
+  mask = ERC32_MEC.Interrupt_Mask;
+
+  for ( trap=0 ; trap<256 ; trap++ ) {
+
+    /*
+     *  Skip window overflow, underflow, and flush as well as software
+     *  trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ enable.
+     *  Also avoid trap 0x70 - 0x7f which cannot happen and where some of the
+     *  space is used to pass parameters to the program.
+     */
+
+    if (( trap == 5 || trap == 6 ) ||
+#if defined(SPARC_USE_LAZY_FP_SWITCH)
+        ( trap == 4 ) ||
+#endif
+        (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
+        (( trap >= 0x70 ) && ( trap <= 0x83 )) ||
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS ) ||
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS_FP ) ||
+#endif
+        ( trap == 0x80 + SPARC_SWTRAP_IRQEN ))
+      continue;
+
+    set_vector( (rtems_isr_entry) bsp_spurious_handler,
+         SPARC_SYNCHRONOUS_TRAP( trap ), 1 );
+  }
+
+  ERC32_MEC.Interrupt_Mask = mask;
+  sparc_enable_interrupts(level);
+
+}
diff --git a/bsps/sparc/leon2/start/bsp_specs b/bsps/sparc/leon2/start/bsp_specs
new file mode 100644
index 0000000000..87638cc027
--- /dev/null
+++ b/bsps/sparc/leon2/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/sparc/leon2/start/bspdelay.c b/bsps/sparc/leon2/start/bspdelay.c
new file mode 100644
index 0000000000..5ee8123157
--- /dev/null
+++ b/bsps/sparc/leon2/start/bspdelay.c
@@ -0,0 +1,27 @@
+/**
+ * @file
+ * @ingroup sparc_leon2
+ * @brief LEON2 BSP Delay Method
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2011.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+void rtems_bsp_delay(int usecs)
+{
+  uint32_t then;
+
+  then  = LEON_REG.Timer_Counter_1;
+  then += usecs;
+
+  while (LEON_REG.Timer_Counter_1 >= then)
+    ;
+}
diff --git a/bsps/sparc/leon2/start/bspidle.c b/bsps/sparc/leon2/start/bspidle.c
new file mode 100644
index 0000000000..8f11f66fb1
--- /dev/null
+++ b/bsps/sparc/leon2/start/bspidle.c
@@ -0,0 +1,35 @@
+/**
+ * @file
+ * @ingroup sparc_leon2
+ * @brief LEON2 Idle Thread 
+ */
+
+/*
+ *  LEON2 Idle Thread with power-down function
+ *
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to LEON implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+
+void *bsp_idle_thread( uintptr_t ignored )
+{
+  while (1) {
+    /* make sure on load follows store to power-down reg */
+    LEON_REG.Power_Down = LEON_REG.Power_Down;
+  }
+  return NULL;
+}
+
diff --git a/bsps/sparc/leon2/start/bspstart.c b/bsps/sparc/leon2/start/bspstart.c
new file mode 100644
index 0000000000..f2ed8ae16c
--- /dev/null
+++ b/bsps/sparc/leon2/start/bspstart.c
@@ -0,0 +1,127 @@
+/**
+ * @file
+ * @ingroup sparc_leon2
+ * @brief LEON2 Cache Snooping Support
+ */
+
+/*
+ *  LEON2 Cache Snooping Support
+ *
+ *  COPYRIGHT (c) 2011
+ *  Aeroflex Gaisler
+ *
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to ERC32 implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <rtems/sysinit.h>
+
+/*
+ * Tells us if data cache snooping is available
+ */
+int CPU_SPARC_HAS_SNOOPING;
+
+/*
+ * set_snooping
+ *
+ * Read the data cache configuration register to determine if
+ * bus snooping is available. This is needed for some drivers so
+ * that they can select the most efficient copy routines.
+ */
+static inline int set_snooping(void)
+{
+  unsigned int tmp = *(unsigned int *)0x80000014; /* Cache control register */
+  return ((tmp>>23) & 1); /* Data cache snooping enabled */
+}
+
+void bsp_start( void )
+{
+  CPU_SPARC_HAS_SNOOPING = set_snooping();
+}
+
+/* If RTEMS_DRVMGR_STARTUP is defined extra code is added that
+ * registers the LEON2 AMBA bus driver as root driver into the
+ * driver manager.
+ *
+ * The structues here are declared weak so that the user can override
+ * the configuration and add custom cores in the RTEMS project.
+ */
+#ifdef RTEMS_DRVMGR_STARTUP
+#include <drvmgr/drvmgr.h>
+#include <drvmgr/leon2_amba_bus.h>
+
+/* All drivers included by BSP, this is overridden by the user by including
+ * the devmgr_confdefs.h. No specifc drivers needed by BSP since IRQ/TIMER/UART
+ * is not drvmgr drivers.
+ */
+drvmgr_drv_reg_func drvmgr_drivers[] __attribute__((weak)) =
+{
+  NULL /* End array with NULL */
+};
+
+/* Defines what cores are avilable on the bus in addition to the standard
+ * LEON2 peripherals.
+ */
+struct leon2_core leon2_amba_custom_cores[] __attribute__((weak)) =
+{
+  EMPTY_LEON2_CORE
+};
+
+/* Configure LEON2 Root bus driver */
+struct leon2_bus leon2_bus_config __attribute__((weak)) =
+{
+  &leon2_std_cores[0], /* The standard cores, defined by driver */
+  &leon2_amba_custom_cores[0],   /* custom cores, defined by us */
+  DRVMGR_TRANSLATE_ONE2ONE,
+  DRVMGR_TRANSLATE_ONE2ONE,
+};
+
+/* Driver resources on LEON2 AMBA bus. Used to set options for particular
+ * LEON2 cores, it is up to the driver to look at the configuration paramters
+ * once started.
+ */
+struct drvmgr_bus_res leon2_amba_res __attribute__((weak)) =
+{
+  .next = NULL,
+  .resource = {
+    DRVMGR_RES_EMPTY
+  },
+};
+#endif /* RTEMS_DRVMGR_STARTUP */
+
+/*
+ * Called just before drivers are initialized.  Is used to initialize shared
+ * interrupt handling.
+ */
+static void leon2_pre_driver_hook( void )
+{
+  bsp_spurious_initialize();
+
+  /* Initialize shared interrupt handling, must be done after IRQ
+   * controller has been found and initialized.
+   */
+  BSP_shared_interrupt_init();
+
+#ifdef RTEMS_DRVMGR_STARTUP
+  leon2_root_register(&leon2_bus_config, &leon2_amba_res);
+#endif
+}
+
+RTEMS_SYSINIT_ITEM(
+  leon2_pre_driver_hook,
+  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
+  RTEMS_SYSINIT_ORDER_MIDDLE
+);
diff --git a/bsps/sparc/leon2/start/linkcmds b/bsps/sparc/leon2/start/linkcmds
new file mode 100644
index 0000000000..f1c7b9ce3e
--- /dev/null
+++ b/bsps/sparc/leon2/start/linkcmds
@@ -0,0 +1,29 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/*
+ *  Base address of the on-CPU peripherals
+ */
+
+_LEON_REG = 0x80000000;
+LEON_REG = _LEON_REG;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon2/start/linkcmds.at697f b/bsps/sparc/leon2/start/linkcmds.at697f
new file mode 100644
index 0000000000..36e6ec49cb
--- /dev/null
+++ b/bsps/sparc/leon2/start/linkcmds.at697f
@@ -0,0 +1 @@
+INCLUDE linkcmds.leon2
diff --git a/bsps/sparc/leon2/start/linkcmds.leon2 b/bsps/sparc/leon2/start/linkcmds.leon2
new file mode 100644
index 0000000000..f1c7b9ce3e
--- /dev/null
+++ b/bsps/sparc/leon2/start/linkcmds.leon2
@@ -0,0 +1,29 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/*
+ *  Base address of the on-CPU peripherals
+ */
+
+_LEON_REG = 0x80000000;
+LEON_REG = _LEON_REG;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon2/start/setvec.c b/bsps/sparc/leon2/start/setvec.c
new file mode 100644
index 0000000000..e2d839c2e4
--- /dev/null
+++ b/bsps/sparc/leon2/start/setvec.c
@@ -0,0 +1,65 @@
+/**
+ * @file
+ * @ingroup sparc_leon2
+ * @brief Installs an interrupt vector on the SPARC simulator
+ */
+
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the SPARC simulator.
+ *
+ *  INPUT PARAMETERS:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  OUTPUT PARAMETERS:  NONE
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to LEON implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+
+rtems_isr_entry set_vector(                   /* returns old vector */
+  rtems_isr_entry     handler,                /* isr routine        */
+  rtems_vector_number vector,                 /* vector number      */
+  int                 type                    /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+  uint32_t      real_trap;
+  uint32_t      source;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, &previous_isr );
+  else
+    _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
+
+  real_trap = SPARC_REAL_TRAP_NUMBER( vector );
+
+  if ( LEON_INT_TRAP( real_trap ) ) {
+
+    source = LEON_TRAP_SOURCE( real_trap );
+
+    LEON_Clear_interrupt( source );
+    LEON_Unmask_interrupt( source );
+  }
+
+  return previous_isr;
+}
diff --git a/bsps/sparc/leon2/start/spurious.c b/bsps/sparc/leon2/start/spurious.c
new file mode 100644
index 0000000000..971c3cd44b
--- /dev/null
+++ b/bsps/sparc/leon2/start/spurious.c
@@ -0,0 +1,184 @@
+/**
+ * @file
+ * @ingroup sparc_leon2
+ * @brief LEON Spurious Trap Handler
+ */
+
+/*
+ *  LEON Spurious Trap Handler
+ *
+ *  This is just enough of a trap handler to let us know what
+ *  the likely source of the trap was.
+ *
+ *  Developed as part of the port of RTEMS to the LEON implementation
+ *  of the SPARC by On-Line Applications Research Corporation (OAR)
+ *  under contract to the European Space Agency (ESA).
+ *
+ *  COPYRIGHT (c) 1995. European Space Agency.
+ *
+ *  This terms of the RTEMS license apply to this file.
+ */
+
+#include <bsp.h>
+#include <rtems/bspIo.h>
+#include <inttypes.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+  uint32_t                   trap;
+  uint32_t                   real_trap;
+  const CPU_Interrupt_frame *isf;
+
+  trap = frame->trap;
+  real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+  isf = frame->isf;
+
+  printk(
+    "Unexpected trap (%2" PRId32 ") at address 0x%08" PRIx32 "\n",
+    real_trap,
+    isf->tpc
+  );
+
+  switch (real_trap) {
+
+    /*
+     *  First the ones defined by the basic architecture
+     */
+
+    case 0x00:
+      printk( "reset\n" );
+      break;
+    case 0x01:
+      printk( "instruction access exception\n" );
+      break;
+    case 0x02:
+      printk( "illegal instruction\n" );
+      break;
+    case 0x03:
+      printk( "privileged instruction\n" );
+      break;
+    case 0x04:
+      printk( "fp disabled\n" );
+      break;
+    case 0x07:
+      printk( "memory address not aligned\n" );
+      break;
+    case 0x08:
+      printk( "fp exception\n" );
+      break;
+    case 0x09:
+      printk("data access exception at 0x%08x\n", LEON_REG.Failed_Address );
+      break;
+    case 0x0A:
+      printk( "tag overflow\n" );
+      break;
+
+    /*
+     *  Then the ones defined by the LEON in particular
+     */
+
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR ):
+      printk( "LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_UART_2_RX_TX ):
+      printk( "LEON_INTERRUPT_UART_2_RX_TX\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_UART_1_RX_TX ):
+      printk( "LEON_INTERRUPT_UART_1_RX_TX\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_0 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_0\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_1 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_1\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_2 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_2\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_3 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_3\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_TIMER1 ):
+      printk( "LEON_INTERRUPT_TIMER1\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_TIMER2 ):
+      printk( "LEON_INTERRUPT_TIMER2\n" );
+      break;
+
+    default:
+      break;
+  }
+}
+
+static rtems_isr bsp_spurious_handler(
+   rtems_vector_number trap,
+   CPU_Interrupt_frame *isf
+)
+{
+  CPU_Exception_frame frame = {
+    .trap = trap,
+    .isf = isf
+  };
+
+#if !defined(SPARC_USE_LAZY_FP_SWITCH)
+  if ( SPARC_REAL_TRAP_NUMBER( trap ) == 4 ) {
+    _Internal_error( INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT );
+  }
+#endif
+
+  rtems_fatal(
+    RTEMS_FATAL_SOURCE_EXCEPTION,
+    (rtems_fatal_code) &frame
+  );
+}
+
+/*
+ *  bsp_spurious_initialize
+ *
+ *  Install the spurious handler for most traps. Note that set_vector()
+ *  will unmask the corresponding asynchronous interrupt, so the initial
+ *  interrupt mask is restored after the handlers are installed.
+ */
+
+void bsp_spurious_initialize()
+{
+  uint32_t trap;
+  uint32_t level;
+  uint32_t mask;
+
+  level = sparc_disable_interrupts();
+  mask = LEON_REG.Interrupt_Mask;
+
+  for ( trap=0 ; trap<256 ; trap++ ) {
+
+    /*
+     *  Skip window overflow, underflow, and flush as well as software
+     *  trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ enable.
+     *  Also avoid trap 0x70 - 0x7f which cannot happen and where some of the
+     *  space is used to pass parameters to the program.
+     */
+
+    if (( trap == 5 || trap == 6 ) ||
+#if defined(SPARC_USE_LAZY_FP_SWITCH)
+        ( trap == 4 ) ||
+#endif
+        (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
+        (( trap >= 0x70 ) && ( trap <= 0x83 )) ||
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS ) ||
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS_FP ) ||
+#endif
+        ( trap == 0x80 + SPARC_SWTRAP_IRQEN ))
+      continue;
+
+    set_vector(
+        (rtems_isr_entry) bsp_spurious_handler,
+        SPARC_SYNCHRONOUS_TRAP( trap ),
+        1
+    );
+  }
+
+  LEON_REG.Interrupt_Mask = mask;
+  sparc_enable_interrupts(level);
+
+}
diff --git a/bsps/sparc/leon3/start/bsp_fatal_halt.c b/bsps/sparc/leon3/start/bsp_fatal_halt.c
new file mode 100644
index 0000000000..fa907a3363
--- /dev/null
+++ b/bsps/sparc/leon3/start/bsp_fatal_halt.c
@@ -0,0 +1,36 @@
+/**
+ * @file
+ * @ingroup sparc_leon3
+ * @brief LEON3 BSP Fatal_halt handler.
+ *
+ *  COPYRIGHT (c) 2014.
+ *  Aeroflex Gaisler AB.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <leon.h>
+
+#ifdef BSP_POWER_DOWN_AT_FATAL_HALT
+
+/* Power down LEON CPU on fatal error exit */
+void _CPU_Fatal_halt(uint32_t source, uint32_t error)
+{
+  sparc_disable_interrupts();
+  leon3_power_down_loop();
+}
+
+#else
+
+/* return to debugger, simulator, hypervisor or similar by exiting
+ * with an error code. g1=1, g2=FATAL_SOURCE, G3=error-code.
+ */
+void _CPU_Fatal_halt(uint32_t source, uint32_t error)
+{
+  sparc_syscall_exit(source, error);
+}
+
+#endif
diff --git a/bsps/sparc/leon3/start/bsp_specs b/bsps/sparc/leon3/start/bsp_specs
new file mode 100644
index 0000000000..87638cc027
--- /dev/null
+++ b/bsps/sparc/leon3/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/sparc/leon3/start/bspclean.c b/bsps/sparc/leon3/start/bspclean.c
new file mode 100644
index 0000000000..eff9c8635b
--- /dev/null
+++ b/bsps/sparc/leon3/start/bspclean.c
@@ -0,0 +1,83 @@
+/**
+ * @file
+ * @ingroup sparc_leon3
+ * @brief LEON3 BSP fatal extension
+ *
+ *  Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ *  COPYRIGHT (c) 2014
+ *  Aeroflex Gaisler
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <rtems/bspIo.h>
+#include <rtems/score/smpimpl.h>
+
+void bsp_fatal_extension(
+  rtems_fatal_source source,
+  bool always_set_to_false,
+  rtems_fatal_code code
+)
+{
+  /* On SMP we must wait for all other CPUs not requesting a fatal halt, they
+   * are responding to another CPU's fatal request. These CPUs goes into
+   * power-down. The CPU requesting fatal halt waits for the others and then
+   * handles the system shutdown via the normal procedure.
+   */
+  #ifdef RTEMS_SMP
+  if ((source == RTEMS_FATAL_SOURCE_SMP) &&
+      (code == SMP_FATAL_SHUTDOWN_RESPONSE)) {
+    leon3_power_down_loop(); /* CPU didn't start shutdown sequence .. */
+  } else {
+    volatile struct irqmp_regs *irqmp = LEON3_IrqCtrl_Regs;
+
+    if (irqmp != NULL) {
+      /*
+       * Value was choosen to get something in the magnitude of 1ms on a 200MHz
+       * processor.
+       */
+      uint32_t max_wait = 1234567;
+      uint32_t self_cpu = rtems_get_current_processor();
+      uint32_t cpu_count = rtems_get_processor_count();
+      uint32_t halt_mask = 0;
+      uint32_t i;
+
+      for (i = 0; i < cpu_count; ++i) {
+        if ( (i != self_cpu) && _SMP_Should_start_processor( i ) ) {
+          halt_mask |= UINT32_C(1) << i;
+        }
+      }
+
+      /* Wait some time for secondary processors to halt */
+      i = 0;
+      while ((irqmp->mpstat & halt_mask) != halt_mask && i < max_wait) {
+        ++i;
+      }
+    }
+  }
+  #endif
+
+  #if (BSP_PRINT_EXCEPTION_CONTEXT)
+    if ( source == RTEMS_FATAL_SOURCE_EXCEPTION ) {
+      rtems_exception_frame_print( (const rtems_exception_frame *) code );
+    }
+  #endif
+
+  /*
+   *  If user wants to implement custom reset/reboot it can be done here
+   */
+  #if (BSP_RESET_BOARD_AT_EXIT)
+    bsp_reset();
+  #endif
+}
diff --git a/bsps/sparc/leon3/start/bspdelay.c b/bsps/sparc/leon3/start/bspdelay.c
new file mode 100644
index 0000000000..938a8bdccb
--- /dev/null
+++ b/bsps/sparc/leon3/start/bspdelay.c
@@ -0,0 +1,27 @@
+/**
+ *  @file
+ *
+ *  LEON3 BSP Delay Method
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2011.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+void rtems_bsp_delay(int usecs)
+{
+  uint32_t then;
+
+  then  =LEON3_Timer_Regs->timer[0].value;
+  then += usecs;
+
+  while (LEON3_Timer_Regs->timer[0].value >= then)
+    ;
+}
diff --git a/bsps/sparc/leon3/start/bspidle.S b/bsps/sparc/leon3/start/bspidle.S
new file mode 100644
index 0000000000..8557ff42a1
--- /dev/null
+++ b/bsps/sparc/leon3/start/bspidle.S
@@ -0,0 +1,28 @@
+/*
+ *  Idle Thread Body
+ *
+ *  This routine puts LEON3 in power-down mode.
+ *
+ *  COPYRIGHT (c) 2004.
+ *  Gaisler Research.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+
+
+#include <rtems/asm.h>
+
+/* LEON specific power-down function */
+
+        .align 4
+        PUBLIC(bsp_idle_thread)
+        PUBLIC(leon3_power_down_loop)
+SYM(bsp_idle_thread):
+SYM(leon3_power_down_loop):
+pwdloop:  mov   %g0, %asr19
+          lda   [%sp] 1, %g0            ! Needed for UT699 and GR712
+          ba,a    pwdloop
+           nop
diff --git a/bsps/sparc/leon3/start/bspsmp.c b/bsps/sparc/leon3/start/bspsmp.c
new file mode 100644
index 0000000000..280788fa1c
--- /dev/null
+++ b/bsps/sparc/leon3/start/bspsmp.c
@@ -0,0 +1,97 @@
+/**
+ * @file
+ * @ingroup sparc_leon3
+ * @brief LEON3 SMP BSP Support
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2011.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/fatal.h>
+#include <leon.h>
+#include <rtems/bspIo.h>
+#include <rtems/score/smpimpl.h>
+#include <stdlib.h>
+
+#if !defined(__leon__) || defined(RTEMS_PARAVIRT)
+uint32_t _CPU_SMP_Get_current_processor( void )
+{
+  return _LEON3_Get_current_processor();
+}
+#endif
+
+static rtems_isr bsp_inter_processor_interrupt(
+  rtems_vector_number vector
+)
+{
+  _SMP_Inter_processor_interrupt_handler();
+}
+
+void bsp_start_on_secondary_processor()
+{
+  uint32_t cpu_index_self = _CPU_SMP_Get_current_processor();
+
+  /*
+   * If data cache snooping is not enabled we terminate using BSP_fatal_exit()
+   * instead of bsp_fatal().  This is done since the latter function tries to
+   * acquire a ticket lock, an operation which requires data cache snooping to
+   * be enabled.
+   */
+  if ( !leon3_data_cache_snooping_enabled() )
+    BSP_fatal_exit( LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR );
+
+  /* Unmask IPI interrupts at Interrupt controller for this CPU */
+  LEON3_IrqCtrl_Regs->mask[cpu_index_self] |= 1U << LEON3_mp_irq;
+
+  _SMP_Start_multitasking_on_secondary_processor();
+}
+
+uint32_t _CPU_SMP_Initialize( void )
+{
+  if ( !leon3_data_cache_snooping_enabled() )
+    bsp_fatal( LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR );
+
+  if ( rtems_configuration_get_maximum_processors() > 1 ) {
+    LEON_Unmask_interrupt(LEON3_mp_irq);
+    set_vector(bsp_inter_processor_interrupt, LEON_TRAP_TYPE(LEON3_mp_irq), 1);
+  }
+
+  return leon3_get_cpu_count(LEON3_IrqCtrl_Regs);
+}
+
+bool _CPU_SMP_Start_processor( uint32_t cpu_index )
+{
+  #if defined(RTEMS_DEBUG)
+    printk( "Waking CPU %d\n", cpu_index );
+  #endif
+
+  LEON3_IrqCtrl_Regs->mpstat = 1U << cpu_index;
+
+  return true;
+}
+
+void _CPU_SMP_Finalize_initialization( uint32_t cpu_count )
+{
+  (void) cpu_count;
+
+  /* Nothing to do */
+}
+
+void _CPU_SMP_Prepare_start_multitasking( void )
+{
+  rtems_cache_invalidate_entire_instruction();
+}
+
+void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
+{
+  /* send interrupt to destination CPU */
+  LEON3_IrqCtrl_Regs->force[target_processor_index] = 1 << LEON3_mp_irq;
+}
diff --git a/bsps/sparc/leon3/start/bspstart.c b/bsps/sparc/leon3/start/bspstart.c
new file mode 100644
index 0000000000..58fc7d0907
--- /dev/null
+++ b/bsps/sparc/leon3/start/bspstart.c
@@ -0,0 +1,125 @@
+/*
+ *  This set of routines starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before any of these are invoked.
+ *
+ *  COPYRIGHT (c) 2011
+ *  Aeroflex Gaisler
+ *
+ *  COPYRIGHT (c) 1989-2013.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Modified for LEON3 BSP.
+ *  COPYRIGHT (c) 2004.
+ *  Gaisler Research.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <leon.h>
+#include <bsp/bootcard.h>
+#include <drvmgr/drvmgr.h>
+#include <rtems/sysinit.h>
+
+#if defined(RTEMS_SMP) || defined(RTEMS_MULTIPROCESSING)
+/* Irq used by shared memory driver and for inter-processor interrupts.
+ * Can be overridden by being defined in the application.
+ */
+const unsigned char LEON3_mp_irq __attribute__((weak)) = 14;
+#endif
+
+/*
+ * Tells us if data cache snooping is available
+ */
+int CPU_SPARC_HAS_SNOOPING;
+
+/* Index of CPU, in an AMP system CPU-index may be non-zero */
+uint32_t LEON3_Cpu_Index = 0;
+
+#if defined(RTEMS_SMP)
+/* Index of the boot CPU. Set by the first CPU at boot to its CPU ID. */
+int LEON3_Boot_Cpu = -1;
+#endif
+
+/*
+ * set_snooping
+ *
+ * Read the cache control register to determine if
+ * bus snooping is available and enabled. This is needed for some
+ * drivers so that they can select the most efficient copy routines.
+ *
+ */
+
+static inline int set_snooping(void)
+{
+  return (leon3_get_cache_control_register() >> 23) & 1;
+}
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+void bsp_start( void )
+{
+  CPU_SPARC_HAS_SNOOPING = set_snooping();
+}
+
+static void leon3_cpu_index_init(void)
+{
+  /* Get the LEON3 CPU index, normally 0, but for MP systems we do
+   * _not_ assume that this is CPU0. One may run another OS on CPU0
+   * and RTEMS on this CPU, and AMP system with mixed operating
+   * systems
+   */
+  LEON3_Cpu_Index = _LEON3_Get_current_processor();
+}
+
+RTEMS_SYSINIT_ITEM(
+  leon3_cpu_index_init,
+  RTEMS_SYSINIT_BSP_START,
+  RTEMS_SYSINIT_ORDER_FIRST
+);
+
+static void leon3_interrupt_common_init( void )
+{
+  /* Initialize shared interrupt handling, must be done after IRQ
+   * controller has been found and initialized.
+   */
+  BSP_shared_interrupt_init();
+}
+
+/*
+ * Called just before drivers are initialized.  Is used to initialize shared
+ * interrupt handling.
+ */
+static void leon3_pre_driver_hook( void )
+{
+  bsp_spurious_initialize();
+
+#ifndef RTEMS_DRVMGR_STARTUP
+  leon3_interrupt_common_init();
+#endif
+}
+
+RTEMS_SYSINIT_ITEM(
+  leon3_pre_driver_hook,
+  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
+  RTEMS_SYSINIT_ORDER_MIDDLE
+);
+
+#ifdef RTEMS_DRVMGR_STARTUP
+/*
+ * Initialize shared interrupt handling, must be done after IRQ controller has
+ * been found and initialized.
+ */
+RTEMS_SYSINIT_ITEM(
+  leon3_interrupt_common_init,
+  RTEMS_SYSINIT_DRVMGR_LEVEL_1,
+  RTEMS_SYSINIT_ORDER_LAST
+);
+#endif
diff --git a/bsps/sparc/leon3/start/cpucounter.c b/bsps/sparc/leon3/start/cpucounter.c
new file mode 100644
index 0000000000..87554ce550
--- /dev/null
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2014, 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <leon.h>
+
+#include <rtems/counter.h>
+#include <rtems/sysinit.h>
+#include <rtems/score/sparcimpl.h>
+
+static void leon3_counter_initialize(void)
+{
+  volatile struct irqmp_timestamp_regs *irqmp_ts;
+  volatile struct gptimer_regs *gpt;
+  unsigned int freq;
+
+  irqmp_ts = &LEON3_IrqCtrl_Regs->timestamp[0];
+  gpt = LEON3_Timer_Regs;
+
+  leon3_up_counter_enable();
+
+  if (leon3_up_counter_is_available()) {
+    /* Use the LEON4 up-counter if available */
+
+    _SPARC_Counter_initialize(
+      _SPARC_Counter_read_asr23,
+      _SPARC_Counter_difference_normal,
+      NULL
+    );
+
+    freq = leon3_up_counter_frequency();
+    rtems_counter_initialize_converter(freq);
+  } else if (leon3_irqmp_has_timestamp(irqmp_ts)) {
+    /* Use the interrupt controller timestamp counter if available */
+
+    /* Enable interrupt timestamping for an arbitrary interrupt line */
+    irqmp_ts->control = 0x1;
+
+    _SPARC_Counter_initialize(
+      _SPARC_Counter_read_address,
+      _SPARC_Counter_difference_normal,
+      (volatile const uint32_t *) &irqmp_ts->counter
+    );
+
+    freq = ambapp_freq_get(&ambapp_plb, LEON3_IrqCtrl_Adev);
+    rtems_counter_initialize_converter(freq);
+  } else if (gpt != NULL) {
+    /* Fall back to the first GPTIMER if available */
+
+    /* Enable timer just in case no clock driver is configured */
+    gpt->timer[LEON3_CLOCK_INDEX].ctrl |= GPTIMER_TIMER_CTRL_EN;
+
+    _SPARC_Counter_initialize(
+      _SPARC_Counter_read_address,
+      _SPARC_Counter_difference_clock_period,
+      (volatile const uint32_t *) &gpt->timer[LEON3_CLOCK_INDEX].value
+    );
+
+    freq = ambapp_freq_get(&ambapp_plb, LEON3_Timer_Adev);
+    rtems_counter_initialize_converter(freq / (gpt->scaler_reload - 1));
+  }
+}
+
+RTEMS_SYSINIT_ITEM(
+  leon3_counter_initialize,
+  RTEMS_SYSINIT_BSP_START,
+  RTEMS_SYSINIT_ORDER_THIRD
+);
+
+SPARC_COUNTER_DEFINITION;
diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
new file mode 100644
index 0000000000..1f7be1ba74
--- /dev/null
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -0,0 +1,66 @@
+/*
+ *  GRLIB/LEON3 extended interrupt controller
+ *
+ *  COPYRIGHT (c) 2011
+ *  Aeroflex Gaisler
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ */
+
+#include <leon.h>
+#include <bsp/irq.h>
+
+/* GRLIB extended IRQ controller IRQ number */
+int LEON3_IrqCtrl_EIrq = -1;
+
+/* Initialize Extended Interrupt controller */
+void leon3_ext_irq_init(void)
+{
+  if ( (LEON3_IrqCtrl_Regs->mpstat >> 16) & 0xf ) {
+    /* Extended IRQ controller available */
+    LEON3_IrqCtrl_EIrq = (LEON3_IrqCtrl_Regs->mpstat >> 16) & 0xf;
+  }
+}
+
+void bsp_interrupt_set_affinity(
+  rtems_vector_number vector,
+  const Processor_mask *affinity
+)
+{
+  uint32_t unmasked = 0;
+  uint32_t cpu_count = rtems_get_processor_count();
+  uint32_t cpu_index;
+
+  for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
+    if (_Processor_mask_Is_set(affinity, cpu_index)) {
+      BSP_Cpu_Unmask_interrupt(vector, cpu_index);
+      ++unmasked;
+    }
+  }
+
+  if (unmasked > 1) {
+    LEON_Enable_interrupt_broadcast(vector);
+  } else {
+    LEON_Disable_interrupt_broadcast(vector);
+  }
+}
+
+void bsp_interrupt_get_affinity(
+  rtems_vector_number vector,
+  Processor_mask *affinity
+)
+{
+  uint32_t cpu_count = rtems_get_processor_count();
+  uint32_t cpu_index;
+
+  _Processor_mask_Zero(affinity);
+
+  for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
+    if (!BSP_Cpu_Is_interrupt_masked(vector, cpu_index)) {
+      _Processor_mask_Set(affinity, cpu_index);
+    }
+  }
+}
diff --git a/bsps/sparc/leon3/start/linkcmds.gr712rc b/bsps/sparc/leon3/start/linkcmds.gr712rc
new file mode 100644
index 0000000000..6954e88f45
--- /dev/null
+++ b/bsps/sparc/leon3/start/linkcmds.gr712rc
@@ -0,0 +1,22 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon3/start/linkcmds.gr740 b/bsps/sparc/leon3/start/linkcmds.gr740
new file mode 100644
index 0000000000..c16fd7fd7f
--- /dev/null
+++ b/bsps/sparc/leon3/start/linkcmds.gr740
@@ -0,0 +1,21 @@
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 0;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 64M;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0xC0000000, LENGTH = 256M
+  ram     : ORIGIN = 0x00000000, LENGTH = 2048M
+  sram    : ORIGIN = 0xD0000000, LENGTH = 256M
+}
+
+_PROM_START = ORIGIN (rom);
+_RAM_START = ORIGIN (ram);
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon3/start/linkcmds.leon3 b/bsps/sparc/leon3/start/linkcmds.leon3
new file mode 100644
index 0000000000..6954e88f45
--- /dev/null
+++ b/bsps/sparc/leon3/start/linkcmds.leon3
@@ -0,0 +1,22 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon3/start/linkcmds.ut699 b/bsps/sparc/leon3/start/linkcmds.ut699
new file mode 100644
index 0000000000..6954e88f45
--- /dev/null
+++ b/bsps/sparc/leon3/start/linkcmds.ut699
@@ -0,0 +1,22 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon3/start/linkcmds.ut700 b/bsps/sparc/leon3/start/linkcmds.ut700
new file mode 100644
index 0000000000..6954e88f45
--- /dev/null
+++ b/bsps/sparc/leon3/start/linkcmds.ut700
@@ -0,0 +1,22 @@
+/*  linkcmds
+ */
+
+/* Default values, can be overridden */
+
+_PROM_SIZE = DEFINED (_PROM_SIZE) ? _PROM_SIZE : 2M;
+_PROM_START = DEFINED (_PROM_START) ? _PROM_START : 0x00000000;
+
+_RAM_SIZE = DEFINED (_RAM_SIZE) ? _RAM_SIZE : 4M;
+_RAM_START = DEFINED (_RAM_START) ? _RAM_START : 0x40000000;
+
+/* these are the maximum values */
+
+MEMORY
+{
+  rom     : ORIGIN = 0x00000000, LENGTH = 256M
+  ram     : ORIGIN = 0x40000000, LENGTH = 1024M
+}
+
+ENTRY(start)
+
+INCLUDE linkcmds.base
diff --git a/bsps/sparc/leon3/start/setvec.c b/bsps/sparc/leon3/start/setvec.c
new file mode 100644
index 0000000000..5b5888d51a
--- /dev/null
+++ b/bsps/sparc/leon3/start/setvec.c
@@ -0,0 +1,64 @@
+/**  
+ * @file
+ * @ingroup sparc_leon3
+ * @brief Install an interrupt vector on SPARC
+ */
+
+/*  This routine installs an interrupt vector on the SPARC simulator.
+ *
+ *  INPUT PARAMETERS:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  OUTPUT PARAMETERS:  NONE
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ */ 
+
+/*  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Ported to LEON implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space
+ *  Agency (ESA).
+ *
+ *  LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ *  European Space Agency.
+ */
+
+#include <bsp.h>
+
+rtems_isr_entry set_vector(                   /* returns old vector */
+  rtems_isr_entry     handler,                /* isr routine        */
+  rtems_vector_number vector,                 /* vector number      */
+  int                 type                    /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+  uint32_t      real_trap;
+  uint32_t      source;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, &previous_isr );
+  else
+    _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
+
+  real_trap = SPARC_REAL_TRAP_NUMBER( vector );
+
+  if ( LEON_INT_TRAP( real_trap ) ) {
+
+    source = LEON_TRAP_SOURCE( real_trap );
+
+    LEON_Clear_interrupt( source );
+    LEON_Unmask_interrupt( source );
+  }
+
+  return previous_isr;
+}
diff --git a/bsps/sparc/leon3/start/spurious.c b/bsps/sparc/leon3/start/spurious.c
new file mode 100644
index 0000000000..23ac4bf4cf
--- /dev/null
+++ b/bsps/sparc/leon3/start/spurious.c
@@ -0,0 +1,183 @@
+/*
+ *  LEON Spurious Trap Handler
+ *
+ *  This is just enough of a trap handler to let us know what
+ *  the likely source of the trap was.
+ *
+ *  Developed as part of the port of RTEMS to the LEON implementation
+ *  of the SPARC by On-Line Applications Research Corporation (OAR)
+ *  under contract to the European Space Agency (ESA).
+ *
+ *  COPYRIGHT (c) 1995. European Space Agency.
+ *
+ *  Modified for LEON3 BSP.
+ *  COPYRIGHT (c) 2004.
+ *  Gaisler Research.
+ *
+ *  This terms of the RTEMS license apply to this file.
+ */
+
+#include <bsp.h>
+#include <rtems/score/cpu.h>
+#include <rtems/bspIo.h>
+#include <inttypes.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+  uint32_t                   trap;
+  uint32_t                   real_trap;
+  const CPU_Interrupt_frame *isf;
+
+  trap = frame->trap;
+  real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+  isf = frame->isf;
+
+  printk(
+    "Unexpected trap (%2" PRId32 ") at address 0x%08" PRIx32 "\n",
+    real_trap,
+    isf->tpc
+  );
+
+  switch (real_trap) {
+
+    /*
+     *  First the ones defined by the basic architecture
+     */
+
+    case 0x00:
+      printk( "reset\n" );
+      break;
+    case 0x01:
+      printk( "instruction access exception\n" );
+      break;
+    case 0x02:
+      printk( "illegal instruction\n" );
+      break;
+    case 0x03:
+      printk( "privileged instruction\n" );
+      break;
+    case 0x04:
+      printk( "fp disabled\n" );
+      break;
+    case 0x07:
+      printk( "memory address not aligned\n" );
+      break;
+    case 0x08:
+      printk( "fp exception\n" );
+      break;
+    case 0x0A:
+      printk( "tag overflow\n" );
+      break;
+
+    /*
+     *  Then the ones defined by the LEON in particular
+     */
+      /* FIXME */
+
+      /*
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR ):
+      printk( "LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_UART_2_RX_TX ):
+      printk( "LEON_INTERRUPT_UART_2_RX_TX\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_UART_1_RX_TX ):
+      printk( "LEON_INTERRUPT_UART_1_RX_TX\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_0 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_0\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_1 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_1\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_2 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_2\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_EXTERNAL_3 ):
+      printk( "LEON_INTERRUPT_EXTERNAL_3\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_TIMER1 ):
+      printk( "LEON_INTERRUPT_TIMER1\n" );
+      break;
+    case LEON_TRAP_TYPE( LEON_INTERRUPT_TIMER2 ):
+      printk( "LEON_INTERRUPT_TIMER2\n" );
+      break;
+      */
+
+    default:
+      break;
+  }
+}
+
+static rtems_isr bsp_spurious_handler(
+   rtems_vector_number trap,
+   CPU_Interrupt_frame *isf
+)
+{
+  CPU_Exception_frame frame = {
+    .trap = trap,
+    .isf = isf
+  };
+
+#if !defined(SPARC_USE_LAZY_FP_SWITCH)
+  if ( SPARC_REAL_TRAP_NUMBER( trap ) == 4 ) {
+    _Internal_error( INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT );
+  }
+#endif
+
+  rtems_fatal(
+    RTEMS_FATAL_SOURCE_EXCEPTION,
+    (rtems_fatal_code) &frame
+  );
+}
+
+/*
+ *  bsp_spurious_initialize
+ *
+ *  Install the spurious handler for most traps. Note that set_vector()
+ *  will unmask the corresponding asynchronous interrupt, so the initial
+ *  interrupt mask is restored after the handlers are installed.
+ */
+
+void bsp_spurious_initialize()
+{
+  uint32_t trap;
+  uint32_t level;
+  /* uint32_t mask; */
+
+  level = sparc_disable_interrupts();
+  /* mask = LEON3_IrqCtrl_Regs->mask_p0; */
+
+  for ( trap=0 ; trap<256 ; trap++ ) {
+
+    /*
+     *  Skip window overflow, underflow, and flush as well as software
+     *  trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ enable.
+     *  Also avoid trap 0x70 - 0x7f which cannot happen and where some of the
+     *  space is used to pass parameters to the program.
+     */
+
+    if (( trap == 5 ) || ( trap == 6 ) ||
+#if defined(SPARC_USE_LAZY_FP_SWITCH)
+        ( trap == 4 ) ||
+#endif
+        (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
+        (( trap >= 0x70 ) && ( trap <= 0x83 )) ||
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS ) ||
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
+        ( trap == 0x80 + SPARC_SWTRAP_IRQDIS_FP ) ||
+#endif
+        ( trap == 0x80 + SPARC_SWTRAP_IRQEN ))
+      continue;
+
+    set_vector(
+        (rtems_isr_entry) bsp_spurious_handler,
+        SPARC_SYNCHRONOUS_TRAP( trap ),
+        1
+    );
+  }
+
+  /* LEON3_IrqCtrl_Regs->mask_p0 = mask; */
+  sparc_enable_interrupts(level);
+
+}
diff --git a/bsps/sparc/shared/start/bsp_fatal_exit.c b/bsps/sparc/shared/start/bsp_fatal_exit.c
new file mode 100644
index 0000000000..8b64125c93
--- /dev/null
+++ b/bsps/sparc/shared/start/bsp_fatal_exit.c
@@ -0,0 +1,22 @@
+/**
+ * @file
+ * @ingroup sparc_bsp
+ * @brief ERC32/LEON2/LEON3 BSP specific exit handler.
+ */
+
+/*
+ *  COPYRIGHT (c) 2014.
+ *  Aeroflex Gaisler AB.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <rtems/score/cpu.h>
+
+void BSP_fatal_exit(uint32_t error)
+{
+  sparc_syscall_exit(RTEMS_FATAL_SOURCE_BSP, error);
+}
diff --git a/bsps/sparc/shared/start/bsp_fatal_halt.c b/bsps/sparc/shared/start/bsp_fatal_halt.c
new file mode 100644
index 0000000000..f32ddaafc0
--- /dev/null
+++ b/bsps/sparc/shared/start/bsp_fatal_halt.c
@@ -0,0 +1,38 @@
+/**
+ * @file
+ * @ingroup sparc_bsp
+ * @brief ERC32/LEON2 BSP Fatal_halt handler.
+ *
+ *  COPYRIGHT (c) 2014.
+ *  Aeroflex Gaisler AB.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+#ifdef BSP_POWER_DOWN_AT_FATAL_HALT
+
+/* Spin CPU on fatal error exit */
+void _CPU_Fatal_halt(uint32_t source, uint32_t error)
+{
+  uint32_t level = sparc_disable_interrupts();
+
+  __asm__ volatile ( "mov  %0, %%g1 " : "=r" (level) : "0" (level) );
+
+  while (1) ; /* loop forever */
+}
+
+#else
+
+/* return to debugger, simulator, hypervisor or similar by exiting
+ * with an error code. g1=1, g2=FATAL_SOURCE, G3=error-code.
+ */
+void _CPU_Fatal_halt(uint32_t source, uint32_t error)
+{
+  sparc_syscall_exit(source, error);
+}
+
+#endif
diff --git a/bsps/sparc/shared/start/bspgetworkarea.c b/bsps/sparc/shared/start/bspgetworkarea.c
new file mode 100644
index 0000000000..b05113d9eb
--- /dev/null
+++ b/bsps/sparc/shared/start/bspgetworkarea.c
@@ -0,0 +1,63 @@
+/*
+ *  This set of routines are the BSP specific initialization
+ *  support routines.
+ *
+ *  COPYRIGHT (c) 1989-2008.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+/* #define BSP_GET_WORK_AREA_DEBUG */
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#ifdef BSP_GET_WORK_AREA_DEBUG
+  #include <rtems/bspIo.h>
+#endif
+
+/* Tells us where to put the workspace in case remote debugger is present.  */
+extern uint32_t rdb_start;
+
+/*
+ *  This method returns the base address and size of the area which
+ *  is to be allocated between the RTEMS Workspace and the C Program
+ *  Heap.
+ */
+void bsp_work_area_initialize(void)
+{
+  /* must be identical to STACK_SIZE in start.S */
+  #define STACK_SIZE (16 * 1024)
+
+  /* Early dynamic memory allocator is placed just above _end  */
+  void *work_area_start = (void *)&end;
+  uintptr_t work_area_size  =
+    (uintptr_t)rdb_start - (uintptr_t)&end - STACK_SIZE;
+
+  /*
+   *  The following may be helpful in debugging what goes wrong when
+   *  you are allocating the Work Area in a new BSP.
+   */
+  #ifdef BSP_GET_WORK_AREA_DEBUG
+    {
+      void *sp = __builtin_frame_address(0);
+      void *end = *work_area_start + *work_area_size;
+      printk(
+        "work_area_start = 0x%p\n"
+        "work_area_size = %d 0x%08x\n"
+        "end = 0x%p\n"
+        "current stack pointer = 0x%p%s\n",
+        work_area_start,
+        work_area_size,  /* decimal */
+        work_area_size,  /* hexadecimal */
+        end,
+        sp,
+        ((sp >= *work_area_start && sp <= end) ? " OVERLAPS!" : "")
+     );
+     printk( "rdb_start = 0x%08x\n", rdb_start );
+   }
+ #endif
+
+  bsp_work_area_initialize_default(work_area_start, work_area_size);
+}
diff --git a/bsps/sparc/shared/start/linkcmds.base b/bsps/sparc/shared/start/linkcmds.base
new file mode 100644
index 0000000000..4c7750dfe0
--- /dev/null
+++ b/bsps/sparc/shared/start/linkcmds.base
@@ -0,0 +1,207 @@
+/*  linkcmds
+ */
+
+OUTPUT_ARCH(sparc)
+__DYNAMIC  =  0;
+
+/*
+ * The memory map looks like this:
+ * +--------------------+ <- low memory
+ * | .text              |
+ * |        etext       |
+ * |        ctor list   | the ctor and dtor lists are for
+ * |        dtor list   | C++ support
+ * |        _endtext    |
+ * +--------------------+
+ * | .data              | initialized data goes here
+ * |        _sdata      |
+ * |        _edata      |
+ * +--------------------+
+ * | .bss               |
+ * |        __bss_start | start of bss, cleared by crt0
+ * |        _end        | start of heap, used by sbrk()
+ * +--------------------+
+ * |    heap space      |
+ * |        _ENDHEAP    |
+ * |    stack space     | 
+ * |        __stack     | top of stack
+ * +--------------------+ <- high memory
+ */
+
+_RAM_END = _RAM_START + _RAM_SIZE;
+
+_PROM_END = _PROM_START + _PROM_SIZE;
+
+/*
+ *  Alternate names without leading _.
+ */
+
+PROM_START = _PROM_START;
+PROM_SIZE = _PROM_SIZE;
+PROM_END = _PROM_END;
+
+RAM_START = _RAM_START;
+RAM_SIZE = _RAM_SIZE;
+RAM_END = _RAM_END;
+
+/*
+ * SPARC monitor assumes this is present to provide proper RTEMS awareness.
+ */
+EXTERN(rtems_get_version_string);
+
+STARTUP(start.o)
+
+/*
+ * stick everything in ram (of course)
+ */
+SECTIONS
+{
+  .text :
+  {
+    CREATE_OBJECT_SYMBOLS
+    text_start = .;
+    _text_start = .;
+    *(.text*)
+    . = ALIGN (16);
+
+    KEEP(*(.eh_frame*))
+    . = ALIGN (16);
+
+    *(.gnu.linkonce.t*)
+
+    /*
+     * C++ constructors
+     */
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+
+    _rodata_start = . ;
+    *(.rodata*)
+    *(.gnu.linkonce.r*)
+    _erodata = ALIGN( 0x10 ) ;
+
+    etext = ALIGN(0x10);
+    _etext = .;
+    KEEP(*(.init*))
+    KEEP(*(.fini*))
+    *(.lit)
+    *(.shdata)
+    . = ALIGN (16);
+  } > ram
+  .tdata : {
+    _TLS_Data_begin = .;
+    *(.tdata .tdata.* .gnu.linkonce.td.*)
+    _TLS_Data_end = .;
+  } > ram
+  .tbss : {
+    _TLS_BSS_begin = .;
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    _TLS_BSS_end = .;
+  } > ram
+  _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+  _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+  _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+  _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+  _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+  _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+  .rtemsroset : {
+    /* for pre rtems-libbsd FreeBSD code */
+    __start_set_sysctl_set = .;
+    KEEP(*(set_sysctl_*));
+    __stop_set_sysctl_set = .;
+    KEEP(*(set_domain_*));
+    KEEP(*(set_pseudo_*));
+
+    KEEP (*(SORT(.rtemsroset.*)))
+
+    . = ALIGN (16);
+    _endtext = .;
+  } >ram
+  .rela.dyn       :
+    {
+      *(.rela.init)
+      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+      *(.rela.fini)
+      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+      *(.rela.ctors)
+      *(.rela.dtors)
+      *(.rela.got)
+      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+      *(.rela.rtemsroset*)
+      *(.rela.rtemsrwset*)
+    } >ram
+  .data :
+  {
+    data_start = .;
+    _data_start = .;
+    _sdata = . ;
+    *(.data*)
+    *(.gnu.linkonce.d*)
+    . = ALIGN(0x10);
+    *(.gcc_except_table*)
+    . = ALIGN(0x10);
+    edata = .;
+    _edata = .;
+  } > ram
+  _data_load_start = LOADADDR (.data);
+  .rtemsrwset : {
+    KEEP (*(SORT(.rtemsrwset.*)))
+  } >ram
+  .dynamic	  : { *(.dynamic) 	} >ram
+  .jcr		  : { *(.jcr) 		} >ram
+  .got		  : { *(.got) 		} >ram
+  .plt   	  : { *(.plt) 		} >ram
+  .hash		  : { *(.hash)		} >ram
+  .dynrel	  : { *(.dynrel)	} >ram
+  .dynsym	  : { *(.dynsym)	} >ram
+  .dynstr	  : { *(.dynstr)	} >ram
+  .hash		  : { *(.hash)		} >ram
+  .shbss :
+  {
+    *(.shbss)
+  } > ram
+  .bss :
+  {
+    __bss_start = ALIGN(0x8);
+    _bss_start = .;
+    bss_start = .;
+    *(.bss .bss* .gnu.linkonce.b*)
+    *(COMMON)
+    . = ALIGN (16);
+    end = .;
+    _end = ALIGN(0x8);
+    __end = ALIGN(0x8);
+  } > ram
+  .stab . (NOLOAD) :
+  {
+    [ .stab ]
+  }
+  .stabstr . (NOLOAD) :
+  {
+    [ .stabstr ]
+  }
+}