bsps: Move MPCI support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

5 files changed, 248 insertions, 0 deletions

diff --git a/bsps/sparc/leon3/mpci/README b/bsps/sparc/leon3/mpci/README
new file mode 100644
index 0000000000..9ad11538b7
--- /dev/null
+++ b/bsps/sparc/leon3/mpci/README
@@ -0,0 +1,4 @@
+This should describe how to use SHM in a multiprocessor LEON3
+configuration.
+
+Especially useful would be how to test this on tsim-leon3.
diff --git a/bsps/sparc/leon3/mpci/addrconv.c b/bsps/sparc/leon3/mpci/addrconv.c
new file mode 100644
index 0000000000..2656bc1ccf
--- /dev/null
+++ b/bsps/sparc/leon3/mpci/addrconv.c
@@ -0,0 +1,28 @@
+/*  Shm_Convert_address
+ *
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm_driver.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}
diff --git a/bsps/sparc/leon3/mpci/getcfg.c b/bsps/sparc/leon3/mpci/getcfg.c
new file mode 100644
index 0000000000..fc67cf8e3a
--- /dev/null
+++ b/bsps/sparc/leon3/mpci/getcfg.c
@@ -0,0 +1,76 @@
+/**
+ *  @file
+ *
+ *  LEON3 Shared Memory Driver Support - Configuration
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm_driver.h>
+
+/* Let user override this configuration by declaring this a weak variable */
+shm_config_table BSP_shm_cfgtbl __attribute__((weak)) =
+{
+  (vol_u32 *)0x40000000,    /* USER OVERRIDABLE */
+  0x00001000,               /* USER OVERRIDABLE */
+  SHM_BIG,
+  NULL_CONVERT,
+  INTR_MODE,
+  Shm_Cause_interrupt,
+  {
+    NULL,
+    0,                      /* USER OVERRIDABLE - Uses default MP-IRQ if 0 */
+    4,
+  },
+};
+
+void Shm_Get_configuration(
+  uint32_t   localnode,
+  shm_config_table **shmcfg
+)
+{
+  int i;
+  unsigned int tmp;
+  rtems_multiprocessing_table *mptable;
+
+  BSP_shm_cfgtbl.format       = SHM_BIG;
+
+  /*
+   *  Override cause_intr or shm_isr if your target has
+   *  special requirements.
+   */
+
+  BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+  BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+  BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+  BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+  BSP_shm_cfgtbl.Intr.address =
+     (vol_u32 *) &(LEON3_IrqCtrl_Regs->force[LEON3_Cpu_Index]);
+  if (BSP_shm_cfgtbl.Intr.value == 0)
+    BSP_shm_cfgtbl.Intr.value = 1 << LEON3_mp_irq; /* Use default MP-IRQ */
+  BSP_shm_cfgtbl.Intr.length  = 4;
+
+  if (LEON3_Cpu_Index == 0) {
+    tmp = 0;
+    mptable = rtems_configuration_get_user_multiprocessing_table();
+    for (i = 1; i < mptable->maximum_nodes; i++)
+      tmp |= (1 << i);
+    LEON3_IrqCtrl_Regs->mpstat = tmp;
+  }
+
+  *shmcfg = &BSP_shm_cfgtbl;
+}
diff --git a/bsps/sparc/leon3/mpci/lock.c b/bsps/sparc/leon3/mpci/lock.c
new file mode 100644
index 0000000000..5b118f24b6
--- /dev/null
+++ b/bsps/sparc/leon3/mpci/lock.c
@@ -0,0 +1,90 @@
+/**
+ *  @file
+ *
+ *  LEON3 Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm_driver.h>
+
+
+/*
+ *  Initialize the lock for the specified locked queue.
+ */
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+extern unsigned int LEON3_Atomic_Swap(uint32_t value, uint32_t *address);
+
+__asm__ (
+    ".text\n"
+    ".align 4\n"
+    "LEON3_Atomic_Swap:\n"
+    "  retl\n"
+    "  swapa [%o1] 1, %o0\n"
+);
+
+
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  uint32_t isr_level;
+  uint32_t *lockptr = (uint32_t *) &lq_cb->lock;
+  uint32_t lock_value;
+
+  lock_value = SHM_LOCK_VALUE;
+  rtems_interrupt_disable( isr_level );
+
+    Shm_isrstat = isr_level;
+    while ( lock_value ) {
+      lock_value = LEON3_Atomic_Swap(lock_value, lockptr);
+      /*
+       *  If not available, then may want to delay to reduce load on lock.
+       */
+   }
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  uint32_t isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+
diff --git a/bsps/sparc/leon3/mpci/mpisr.c b/bsps/sparc/leon3/mpci/mpisr.c
new file mode 100644
index 0000000000..cdf05293f1
--- /dev/null
+++ b/bsps/sparc/leon3/mpci/mpisr.c
@@ -0,0 +1,50 @@
+/**
+ *  @file
+ *
+ *  LEON3 Shared Memory Driver Interrupt Support
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm_driver.h>
+
+#if 0
+void Shm_isr(void)
+{
+  /*
+   *  If this routine has to do anything other than the mpisr.c
+   *  found in the generic driver, then copy the contents of the generic
+   *  mpisr.c and augment it to satisfy this particular board.  Typically,
+   *  you need to have a board specific mpisr.c when the interrupt
+   *  must be cleared.
+   *
+   *  If the generic mpisr.c satisifies your requirements, then
+   *  remove this routine from your target's shmsupp/mpisr.c file.
+   *  Then simply install the generic Shm_isr in the Shm_setvec
+   *  routine below.
+   */
+}
+#endif
+
+/*
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ */
+void Shm_setvec( void )
+{
+  /*
+   * Interrupt driven mode is not currently supported.
+   * This is thought to be the interrupt to use.
+   */
+  LEON_Unmask_interrupt(LEON3_mp_irq);
+  set_vector((rtems_isr_entry) Shm_isr, LEON_TRAP_TYPE(LEON3_mp_irq), 1);
+}