diff options
| author | Martin Aberg <maberg@gaisler.com> | 2018-02-21 19:23:35 +0100 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2018-09-20 12:48:32 +0200 |
| commit | c2011b474eb62b9480c399c03b0e7a903fed9b04 (patch) | |
| tree | 01c0cbe51de533d84fecd9a0b21fdcccacd554c7 /bsps/sparc/shared/spw/grspw_pkt.c | |
| parent | tm26: enable FP context when fprintf used (diff) | |
| download | rtems-c2011b474eb62b9480c399c03b0e7a903fed9b04.tar.bz2 | |
leon, grspw_pkt: support CCSDS/ISO16 data CRC
When the CCSDS/CCITT CRC-16 and 16-bit ISO-checksum logic is available in
GRSPW2, the DCRCT field is used to determine how to generate the CRC/checksum
code. grspw_hw_sup has been extended with the field ccsds_crc
Diffstat (limited to 'bsps/sparc/shared/spw/grspw_pkt.c')
| -rw-r--r-- | bsps/sparc/shared/spw/grspw_pkt.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/bsps/sparc/shared/spw/grspw_pkt.c b/bsps/sparc/shared/spw/grspw_pkt.c index 39f50876ed..f28e4be634 100644 --- a/bsps/sparc/shared/spw/grspw_pkt.c +++ b/bsps/sparc/shared/spw/grspw_pkt.c @@ -113,6 +113,7 @@ struct grspw_regs { #define GRSPW_CTRL_RC_BIT 29 #define GRSPW_CTRL_NCH_BIT 27 #define GRSPW_CTRL_PO_BIT 26 +#define GRSPW_CTRL_CC_BIT 25 #define GRSPW_CTRL_ID_BIT 24 #define GRSPW_CTRL_LE_BIT 22 #define GRSPW_CTRL_PS_BIT 21 @@ -137,6 +138,7 @@ struct grspw_regs { #define GRSPW_CTRL_RC (1<<GRSPW_CTRL_RC_BIT) #define GRSPW_CTRL_NCH (0x3<<GRSPW_CTRL_NCH_BIT) #define GRSPW_CTRL_PO (1<<GRSPW_CTRL_PO_BIT) +#define GRSPW_CTRL_CC (1<<GRSPW_CTRL_CC_BIT) #define GRSPW_CTRL_ID (1<<GRSPW_CTRL_ID_BIT) #define GRSPW_CTRL_LE (1<<GRSPW_CTRL_LE_BIT) #define GRSPW_CTRL_PS (1<<GRSPW_CTRL_PS_BIT) @@ -3120,6 +3122,7 @@ static int grspw2_init3(struct drvmgr_dev *dev) ctrl = REG_READ(&priv->regs->ctrl); priv->hwsup.rmap = (ctrl & GRSPW_CTRL_RA) >> GRSPW_CTRL_RA_BIT; priv->hwsup.rmap_crc = (ctrl & GRSPW_CTRL_RC) >> GRSPW_CTRL_RC_BIT; + priv->hwsup.ccsds_crc = (ctrl & GRSPW_CTRL_CC) >> GRSPW_CTRL_CC_BIT; priv->hwsup.rx_unalign = (ctrl & GRSPW_CTRL_RX) >> GRSPW_CTRL_RX_BIT; priv->hwsup.nports = 1 + ((ctrl & GRSPW_CTRL_PO) >> GRSPW_CTRL_PO_BIT); priv->hwsup.ndma_chans = 1 + ((ctrl & GRSPW_CTRL_NCH) >> GRSPW_CTRL_NCH_BIT); |