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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-16 14:35:59 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-07-14 12:21:33 +0200 |
commit | a5f95cbb5785a2331894029eae0332ba509d6a4c (patch) | |
tree | 1590b461258527621d5880532b7c00dcc8f66b4e /bsps/sparc/leon3/include/bsp | |
parent | bsps: Use new APBUART register block API (diff) | |
download | rtems-a5f95cbb5785a2331894029eae0332ba509d6a4c.tar.bz2 |
bsp/leon3: Untangle interrupt controller support
Separate the probing of the interrupt controller from the
initialization.
Diffstat (limited to 'bsps/sparc/leon3/include/bsp')
-rw-r--r-- | bsps/sparc/leon3/include/bsp/irqimpl.h | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/bsps/sparc/leon3/include/bsp/irqimpl.h b/bsps/sparc/leon3/include/bsp/irqimpl.h new file mode 100644 index 0000000000..77619c99b9 --- /dev/null +++ b/bsps/sparc/leon3/include/bsp/irqimpl.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsSPARCLEON3 + * + * @brief This header file provides interfaces used by the interrupt support + * implementation. + */ + +/* + * Copyright (C) 2021 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H +#define LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H + +#include <rtems.h> +#include <grlib/grlib.h> + +struct ambapp_dev; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @addtogroup RTEMSBSPsSPARCLEON3 + * + * @{ + */ + +/** + * @brief This lock serializes the interrupt controller access. + */ +extern rtems_interrupt_lock LEON3_IrqCtrl_Lock; + +/** + * @brief This pointer provides the IRQ(A)MP register block address. + */ +extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; + +/** + * @brief This pointer provides the IRQ(A)MP device information block. + */ +extern struct ambapp_dev *LEON3_IrqCtrl_Adev; + +/** + * @brief Initializes the interrupt controller for the boot processor. + * + * @param[in, out] regs is the IRQ(A)MP register block address. + */ +void leon3_ext_irq_init( volatile struct irqmp_regs *regs ); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H */ |