Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 40 insertions, 0 deletions

diff --git a/bsps/sh/gensh4/include/sdram.h b/bsps/sh/gensh4/include/sdram.h
new file mode 100644
index 0000000000..52acaa61db
--- /dev/null
+++ b/bsps/sh/gensh4/include/sdram.h
@@ -0,0 +1,40 @@
+/*
+ * SDRAM Mode Register
+ * Based on Fujitsu MB81F643242B data sheet.
+ *
+ * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
+ * Author: Victor V. Vengerov <vvv@oktet.ru>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef __SDRAM_H__
+#define __SDRAM_H__
+
+/* SDRAM Mode Register */
+#define SDRAM_MODE_BL         0x0007  /* Burst Length: */
+#define SDRAM_MODE_BL_1       0x0000  /*    0 */
+#define SDRAM_MODE_BL_2       0x0001  /*    2 */
+#define SDRAM_MODE_BL_4       0x0002  /*    4 */
+#define SDRAM_MODE_BL_8       0x0003  /*    8 */
+#define SDRAM_MODE_BL_16      0x0004  /*    16 */
+#define SDRAM_MODE_BL_32      0x0005  /*    32 */
+#define SDRAM_MODE_BL_64      0x0006  /*    64 */
+#define SDRAM_MODE_BL_FULL    0x0007  /*    Full column */
+
+#define SDRAM_MODE_BT         0x0008  /* Burst Type: */
+#define SDRAM_MODE_BT_SEQ     0x0000  /*   Sequential */
+#define SDRAM_MODE_BT_ILV     0x0008  /*   Interleave */
+
+#define SDRAM_MODE_CL         0x0070  /* CAS Latency: */
+#define SDRAM_MODE_CL_1       0x0010  /*    1 */
+#define SDRAM_MODE_CL_2       0x0020  /*    2 */
+#define SDRAM_MODE_CL_3       0x0030  /*    3 */
+
+#define SDRAM_MODE_OPC        0x0200  /* Opcode: */
+#define SDRAM_MODE_OPC_BRBW   0x0000  /*     Burst read & Burst write */
+#define SDRAM_MODE_OPC_BRSW   0x0200  /*     Burst read & Single write */
+
+#endif