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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-11-14 11:08:28 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-11-14 11:48:28 +0100 |
commit | df9426f970c6c3ff11300cefbf221abee679b270 (patch) | |
tree | bf01743b689bf2b7a3cbc34157884672ab44f3d4 /bsps/riscv/riscv/include/bsp/riscv.h | |
parent | bsp/gumstix: Fix warning (diff) | |
download | rtems-df9426f970c6c3ff11300cefbf221abee679b270.tar.bz2 |
bsp/riscv: riscv_get_core_frequency()
Always provide this function. Return 0 by default. Fix formatting.
Simplify function.
Update #3785.
Diffstat (limited to 'bsps/riscv/riscv/include/bsp/riscv.h')
-rw-r--r-- | bsps/riscv/riscv/include/bsp/riscv.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/bsps/riscv/riscv/include/bsp/riscv.h b/bsps/riscv/riscv/include/bsp/riscv.h index f2f1a597ca..a469155865 100644 --- a/bsps/riscv/riscv/include/bsp/riscv.h +++ b/bsps/riscv/riscv/include/bsp/riscv.h @@ -38,9 +38,7 @@ extern volatile RISCV_CLINT_regs *riscv_clint; void *riscv_fdt_get_address(const void *fdt, int node); -#if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 uint32_t riscv_get_core_frequency(void); -#endif #ifdef RTEMS_SMP extern uint32_t riscv_hart_count; |