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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-25 11:12:24 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-28 15:03:19 +0200 |
| commit | cdfed94f347a112638b914876de8069e10adf175 (patch) | |
| tree | 02eb3d7b973156ed97ee4d6b962c121a2ac0c6a7 /bsps/riscv/riscv/include/bsp.h | |
| parent | bsp/riscv: Add device tree support for console (diff) | |
| download | rtems-cdfed94f347a112638b914876de8069e10adf175.tar.bz2 | |
bsp/riscv: Rework clock driver
Use device tree provided timebase frequency. Do not write to read-only
mtime register.
Update #3433.
Diffstat (limited to 'bsps/riscv/riscv/include/bsp.h')
| -rw-r--r-- | bsps/riscv/riscv/include/bsp.h | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/bsps/riscv/riscv/include/bsp.h b/bsps/riscv/riscv/include/bsp.h index 6298966a8c..5ec916e6b3 100644 --- a/bsps/riscv/riscv/include/bsp.h +++ b/bsps/riscv/riscv/include/bsp.h @@ -46,28 +46,6 @@ extern "C" { #define BSP_FDT_IS_SUPPORTED -/** - * @defgroup riscv_generic Register Definitions - * - * @ingroup riscv_generic - * - * @brief Shared register definitions for RISC-V systems. - * - * @{ - */ - -/** - * @name Register Macros - * - * @{ - */ - -#define REG(x) (*((volatile unsigned long *) (x))) -#define BIT(n) (1 << (n)) - -#define MTIME_MM 0x000000000200bff8 -#define MTIMECMP_MM 0x0000000002004000 - #ifdef __cplusplus } #endif |