diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-05-19 08:18:25 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-05-20 11:05:26 +0200 |
commit | bcef89f2360b97005e490c92fe624ab9dec789e6 (patch) | |
tree | 61a05a2699d86de26b84acf355d9d9ddaa3c4c5b /bsps/riscv/griscv | |
parent | bsps/microblaze: Add device tree support to GPIO (diff) | |
download | rtems-bcef89f2360b97005e490c92fe624ab9dec789e6.tar.bz2 |
Update company name
The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
Diffstat (limited to 'bsps/riscv/griscv')
-rw-r--r-- | bsps/riscv/griscv/clock/clockdrv.c | 2 | ||||
-rw-r--r-- | bsps/riscv/griscv/include/bsp/irq.h | 2 | ||||
-rw-r--r-- | bsps/riscv/griscv/irq/irq.c | 2 | ||||
-rw-r--r-- | bsps/riscv/griscv/start/bsp_fatal_halt.c | 2 | ||||
-rw-r--r-- | bsps/riscv/griscv/start/bspsmp.c | 2 | ||||
-rw-r--r-- | bsps/riscv/griscv/start/bspstart.c | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/bsps/riscv/griscv/clock/clockdrv.c b/bsps/riscv/griscv/clock/clockdrv.c index a8e157c71c..ab82751e69 100644 --- a/bsps/riscv/griscv/clock/clockdrv.c +++ b/bsps/riscv/griscv/clock/clockdrv.c @@ -15,7 +15,7 @@ * COPYRIGHT (c) 2004. * Gaisler Research. * - * Copyright (c) 2014, 2018 embedded brains GmbH + * Copyright (C) 2014, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/riscv/griscv/include/bsp/irq.h b/bsps/riscv/griscv/include/bsp/irq.h index 634fee4d01..9256e4ff3c 100644 --- a/bsps/riscv/griscv/include/bsp/irq.h +++ b/bsps/riscv/griscv/include/bsp/irq.h @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Copyright (c) 2015 University of York. * Hesham Almatary <hesham@alumni.york.ac.uk> diff --git a/bsps/riscv/griscv/irq/irq.c b/bsps/riscv/griscv/irq/irq.c index ea19797565..507302d4dd 100644 --- a/bsps/riscv/griscv/irq/irq.c +++ b/bsps/riscv/griscv/irq/irq.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Copyright (c) 2015 University of York. * Hesham Almatary <hesham@alumni.york.ac.uk> diff --git a/bsps/riscv/griscv/start/bsp_fatal_halt.c b/bsps/riscv/griscv/start/bsp_fatal_halt.c index 5b1eed3e8f..8af9b37709 100644 --- a/bsps/riscv/griscv/start/bsp_fatal_halt.c +++ b/bsps/riscv/griscv/start/bsp_fatal_halt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Copyright (c) 2015 University of York. * Hesham Almatary <hesham@alumni.york.ac.uk> diff --git a/bsps/riscv/griscv/start/bspsmp.c b/bsps/riscv/griscv/start/bspsmp.c index 0e5fd9903b..0c75c25c2b 100644 --- a/bsps/riscv/griscv/start/bspsmp.c +++ b/bsps/riscv/griscv/start/bspsmp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/riscv/griscv/start/bspstart.c b/bsps/riscv/griscv/start/bspstart.c index 26c214caac..62813a1c28 100644 --- a/bsps/riscv/griscv/start/bspstart.c +++ b/bsps/riscv/griscv/start/bspstart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions |