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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-25 15:06:08 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-26 07:17:57 +0200 |
commit | eb36d1198cdf9dc1e2f776ef6e1e38755f6d13c5 (patch) | |
tree | 14177ad7a58c06a3c537d1e55dae7bc369a1a4b9 /bsps/powerpc/tqm8xx | |
parent | bsps: Remove unmaintained times files (diff) | |
download | rtems-eb36d1198cdf9dc1e2f776ef6e1e38755f6d13c5.tar.bz2 |
bsps: Move documentation, etc. files to bsps
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/powerpc/tqm8xx')
-rw-r--r-- | bsps/powerpc/tqm8xx/README | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/bsps/powerpc/tqm8xx/README b/bsps/powerpc/tqm8xx/README new file mode 100644 index 0000000000..51ab064e76 --- /dev/null +++ b/bsps/powerpc/tqm8xx/README @@ -0,0 +1,137 @@ +This is a README file for the tqm8xx BSP + + +Summary +------- + +BSP NAME: tqm8xx +BOARD: various boards based on TQ Components TQM8xx modules +BUS: No backplane. +CPU FAMILY: PowerPC +CPU: PowerPC MPC860 or MPC866 +COPROCESSORS: Built-in Motorola QUICC +MODE: 32 bit mode + +BOOT MONITOR: TQMon + +PERIPHERALS +=========== +TIMERS: PIT / Timebase + RESOLUTION: 1 microsecond / frequency = clock-speed / 16 +SERIAL PORTS: 1-4 SCCs, 1-2 SMC +REAL-TIME CLOCK: <none> +DMA: Each SCC and SMC. +VIDEO: <none> +SCSI: <none> +NETWORKING: Ethernet 10 Mbps on SCC1 and/or + 10/100Mbps on FEC (for MPC866T) + + +DRIVER INFORMATION +================== +CLOCK DRIVER: yes +CONSOLE DRIVER: yes +SHMSUPP: N/A +TIMER DRIVER: yes +NETWORK DRIVER: yes + +NOTES +===== +On-chip resources: + SCC1 network or serial port + SCC2 serial port + SCC3 serial port + SCC4 serial port + SMC1 serial port + SMC2 serial port + CLK1 network + CLK2 network + CLK3 + CLK4 + CLK5 + CLK6 + CLK7 + CLK8 + BRG1 console + BRG2 console + BRG3 console + BRG4 console + RTC + PIT clock + TB + DEC + SWT + UPMA + UPMB + IRQ0 + IRQ1 + IRQ2 + IRQ3 + IRQ4 + IRQ5 + IRQ6 + IRQ7 + IRQ_LVL0 + IRQ_LVL1 + IRQ_LVL2 + IRQ_LVL3 + IRQ_LVL4 + IRQ_LVL5 + IRQ_LVL6 + IRQ_LVL7 + + +Board description +----------------- +Clock rate: 50MHz - 133MHz. +Bus width: 32 bit Flash, 32 bit DRAM +FLASH: 2-8MB +RAM: 32-256MB SDRAM + + +Installation +------------ +<tbd> + + +Port Description +Console driver +--------------- + +This BSP contains a console driver for polled and interrupt-driven +operation. It supports SCCs and SMCs. +During BSP configuration, various variables can be set to activate a +certain channels and to specify the console channel: + +CONS_SMC1_MODE, CONS_SMC2_MODE, CONS_SCC[1-4]_MODE can be set to +CONS_MODE_UNUSED, CONS_MODE_POLLED or CONS_MODE_IRQ + +The driver always uses termios. + +printk() and debug output +----------------------- +<tbd> + +Floating-point +-------------- + +The MPC8xx do not have floating-point units. All code should +get compiled with the appropriate -mcpu flag. The nof variants of the gcc +runtime libraries should be used for linking. + + + +Miscellaneous +------------- + +All development was based on the mbx8xx and gen68360 port. + +Test Configuration +------------------ + +Board: pghplus ( +CPU: Motorola MPC866T +Clock Speed: 133MHz +RAM: 64MByte +Cache Configuration: Instruction cache on; data cache on, copyback mode. + |