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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-02-25 21:11:00 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-02-26 07:40:17 +0100 |
| commit | a286d28695d312971400c6b25f43d0794f5e9be8 (patch) | |
| tree | 169e5471bced96e5504fe597316bba4b4a776af6 /bsps/powerpc/shared | |
| parent | riscv: Use zicsr architecture extension (diff) | |
| download | rtems-a286d28695d312971400c6b25f43d0794f5e9be8.tar.bz2 | |
powerpc: Use .machine any for some inline asm
Diffstat (limited to 'bsps/powerpc/shared')
| -rw-r--r-- | bsps/powerpc/shared/clock/clock-ppc403.c | 17 | ||||
| -rw-r--r-- | bsps/powerpc/shared/mmu/pte121.c | 12 |
2 files changed, 26 insertions, 3 deletions
diff --git a/bsps/powerpc/shared/clock/clock-ppc403.c b/bsps/powerpc/shared/clock/clock-ppc403.c index 170c17e2cc..bc744455e2 100644 --- a/bsps/powerpc/shared/clock/clock-ppc403.c +++ b/bsps/powerpc/shared/clock/clock-ppc403.c @@ -188,9 +188,22 @@ static void ClockOn(const rtems_irq_connect_data* unused) auto_restart = true; #else /* ppc405 */ - __asm__ volatile ("mfdcr %0, 0x0b2" : "=r" (iocr)); /*405GP CPC0_CR1 */ + __asm__ volatile ( + ".machine \"push\"\n" + ".machine \"any\"\n" + "mfdcr %0, 0x0b2\n" + ".machine \"pop\"" : + "=r" (iocr) + ); /*405GP CPC0_CR1 */ iocr &=~0x800000; /* timer clocked from system clock CETE*/ - __asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */ + __asm__ volatile ( + ".machine \"push\"\n" + ".machine \"any\"\n" + "mtdcr 0x0b2, %0\n" + ".machine \"pop\"" : + "=r" (iocr) : + "0" (iocr) + ); /* 405GP CPC0_CR1 */ /* * Enable auto restart diff --git a/bsps/powerpc/shared/mmu/pte121.c b/bsps/powerpc/shared/mmu/pte121.c index 778d6353a9..e97c86b9ba 100644 --- a/bsps/powerpc/shared/mmu/pte121.c +++ b/bsps/powerpc/shared/mmu/pte121.c @@ -158,7 +158,14 @@ static uint32_t seg2vsid (uint32_t ea) { - __asm__ volatile ("mfsrin %0, %0":"=r" (ea):"0" (ea)); + __asm__ volatile ( + ".machine \"push\"\n" + ".machine \"any\"\n" + "mfsrin %0, %0\n" + ".machine \"pop\"" : + "=r" (ea) : + "0" (ea) + ); return ea & ((1 << LD_VSID_SIZE) - 1); } #else @@ -620,6 +627,8 @@ triv121PgTblActivate (Triv121PgTbl pt) * - restore original MSR */ __asm__ __volatile ( + " .machine \"push\"\n" + " .machine \"any\"\n" " mtctr %[tmp0]\n" /* Get MSR and switch interrupts off - just in case. * Also switch the MMU off; the book @@ -651,6 +660,7 @@ triv121PgTblActivate (Triv121PgTbl pt) /* restore original MSR */ " mtmsr %[tmp0]\n" " isync \n" + " .machine \"pop\"\n" :[tmp0]"+r&"(tmp0), [tmp1]"+b&"(tmp1), [tmp2]"+b&"(tmp2) :[ea_range]"i"(FLUSH_EA_RANGE), [pg_sz]"i" (1 << LD_PG_SIZE), [sdr1]"i"(SDR1), [sdr1val]"r" (sdr1) |