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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 10:35:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 13:52:14 +0200
commit99648958668d3a33ee57974479b36201fe303f34 (patch)
tree6f27ea790e2823c6156e71219a4f54680263fac6 /bsps/powerpc/shared
parentbsps: Move start files to bsps (diff)
downloadrtems-99648958668d3a33ee57974479b36201fe303f34.tar.bz2
bsps: Move startup files to bsps
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
Diffstat (limited to 'bsps/powerpc/shared')
-rw-r--r--bsps/powerpc/shared/start/bspgetworkarea.c40
-rw-r--r--bsps/powerpc/shared/start/bspidle.c36
-rw-r--r--bsps/powerpc/shared/start/linkcmds.base436
-rw-r--r--bsps/powerpc/shared/start/linkcmds.share296
-rw-r--r--bsps/powerpc/shared/start/pgtbl_activate.c77
-rw-r--r--bsps/powerpc/shared/start/pgtbl_setup.c135
-rw-r--r--bsps/powerpc/shared/start/ppc_idle.c106
-rw-r--r--bsps/powerpc/shared/start/probeMemEnd.c219
-rw-r--r--bsps/powerpc/shared/start/sbrk.c147
-rw-r--r--bsps/powerpc/shared/start/zerobss.c42
10 files changed, 1534 insertions, 0 deletions
diff --git a/bsps/powerpc/shared/start/bspgetworkarea.c b/bsps/powerpc/shared/start/bspgetworkarea.c
new file mode 100644
index 0000000000..3c86905020
--- /dev/null
+++ b/bsps/powerpc/shared/start/bspgetworkarea.c
@@ -0,0 +1,40 @@
+/*
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+
+#include <libcpu/powerpc-utility.h>
+
+#include <rtems/sysinit.h>
+
+LINKER_SYMBOL(__rtems_end)
+
+void bsp_work_area_initialize(void)
+{
+ /*
+ * Cannot do work area initialization before bsp_start(), since BSP_mem_size
+ * and MMU is not set up.
+ */
+}
+
+static void bsp_work_area_initialize_later(void)
+{
+ uintptr_t work_size;
+ uintptr_t work_area;
+
+ work_area = (uintptr_t)__rtems_end +
+ rtems_configuration_get_interrupt_stack_size();
+ work_size = (uintptr_t)BSP_mem_size - work_area;
+
+ bsp_work_area_initialize_default((void *) work_area, work_size);
+}
+
+RTEMS_SYSINIT_ITEM(
+ bsp_work_area_initialize_later,
+ RTEMS_SYSINIT_BSP_START,
+ RTEMS_SYSINIT_ORDER_LAST
+);
diff --git a/bsps/powerpc/shared/start/bspidle.c b/bsps/powerpc/shared/start/bspidle.c
new file mode 100644
index 0000000000..de37fa1ced
--- /dev/null
+++ b/bsps/powerpc/shared/start/bspidle.c
@@ -0,0 +1,36 @@
+/*
+ * Moved to libbsp/powerpc/shared by Joel Sherrill (9 Sept 09).
+ */
+
+/*
+ * The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
+ *
+ * Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
+ * Surrey Satellite Technology Limited, 2001
+ *
+ * COPYRIGHT (c) 1989-2009.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+/**
+ * @brief BSP Idle thread body.
+ *
+ * The MSR[POW] bit is set to put the CPU into the low power mode
+ * defined in HID0. HID0 is set during starup in start.S.
+ */
+void *bsp_idle_thread( uintptr_t ignored )
+{
+ for( ; ; ) {
+ __asm__ volatile(
+ "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
+ );
+ }
+
+ return 0; /* to remove warning */
+}
diff --git a/bsps/powerpc/shared/start/linkcmds.base b/bsps/powerpc/shared/start/linkcmds.base
new file mode 100644
index 0000000000..e0dfdcc914
--- /dev/null
+++ b/bsps/powerpc/shared/start/linkcmds.base
@@ -0,0 +1,436 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Linker command base file.
+ */
+
+/*
+ * Copyright (c) 2011, 2016 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+ENTRY (_start)
+STARTUP (start.o)
+
+/*
+ * Global symbols that may be defined externally
+ */
+
+bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 1;
+bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
+bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
+
+MEMORY {
+ UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
+}
+
+SECTIONS {
+ .start : ALIGN_WITH_INPUT {
+ bsp_section_start_begin = .;
+ KEEP (*(.bsp_start_text))
+ KEEP (*(.bsp_start_data))
+ bsp_section_start_end = .;
+ } > REGION_START AT > REGION_START
+ bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin;
+
+ .xbarrier : ALIGN_WITH_INPUT {
+ . = ALIGN (bsp_section_xbarrier_align);
+ } > REGION_TEXT AT > REGION_TEXT
+
+ .text : ALIGN_WITH_INPUT {
+ bsp_section_text_begin = .;
+ *(SORT(.bsp_text*))
+ *(.text.unlikely .text.*_unlikely)
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ *(.gnu.warning)
+ *(.sfpr .glink)
+ } > REGION_TEXT AT > REGION_TEXT_LOAD
+ .init : ALIGN_WITH_INPUT {
+ KEEP (*(.init))
+ } > REGION_TEXT AT > REGION_TEXT_LOAD
+ .fini : ALIGN_WITH_INPUT {
+ PROVIDE (_fini = .);
+ KEEP (*(.fini))
+ bsp_section_text_end = .;
+ } > REGION_TEXT AT > REGION_TEXT_LOAD
+ bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin;
+ bsp_section_text_load_begin = LOADADDR (.text);
+ bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size;
+
+ .fast_text : ALIGN_WITH_INPUT {
+ bsp_section_fast_text_begin = .;
+ *(.bsp_fast_text)
+ bsp_section_fast_text_end = .;
+ } > REGION_FAST_TEXT AT > REGION_FAST_TEXT_LOAD
+ bsp_section_fast_text_size = bsp_section_fast_text_end - bsp_section_fast_text_begin;
+ bsp_section_fast_text_load_begin = LOADADDR (.fast_text);
+ bsp_section_fast_text_load_end = bsp_section_fast_text_load_begin + bsp_section_fast_text_size;
+
+ .robarrier : ALIGN_WITH_INPUT {
+ . = ALIGN (bsp_section_robarrier_align);
+ } > REGION_RODATA AT > REGION_RODATA
+
+ .rodata : ALIGN_WITH_INPUT {
+ bsp_section_rodata_begin = .;
+ *(SORT(.bsp_rodata*))
+ *(.rodata .rodata.* .gnu.linkonce.r.*)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .rodata1 : ALIGN_WITH_INPUT {
+ *(.rodata1)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .sdata2 : ALIGN_WITH_INPUT {
+ PROVIDE (_SDA2_BASE_ = 32768);
+ *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .sbss2 : ALIGN_WITH_INPUT {
+ *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .eh_frame_hdr : ALIGN_WITH_INPUT {
+ *(.eh_frame_hdr)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .eh_frame : ALIGN_WITH_INPUT {
+ KEEP (*(*.eh_frame))
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .gcc_except_table : ALIGN_WITH_INPUT {
+ *(.gcc_except_table *.gcc_except_table.*)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .tdata : ALIGN_WITH_INPUT {
+ _TLS_Data_begin = .;
+ *(.tdata .tdata.* .gnu.linkonce.td.*)
+ _TLS_Data_end = .;
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .tbss : ALIGN_WITH_INPUT {
+ _TLS_BSS_begin = .;
+ *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+ _TLS_BSS_end = .;
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+ _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+ _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+ _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+ _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+ _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+ .preinit_array : ALIGN_WITH_INPUT {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .init_array : ALIGN_WITH_INPUT {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .fini_array : ALIGN_WITH_INPUT {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .ctors : ALIGN_WITH_INPUT {
+ KEEP (*ecrti.o(.ctors))
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*crtbegin?.o(.ctors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o *ecrtn.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .dtors : ALIGN_WITH_INPUT {
+ KEEP (*ecrti.o(.dtors))
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*crtbegin?.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o *ecrtn.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .jcr : ALIGN_WITH_INPUT {
+ KEEP (*(.jcr))
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .data.rel.ro : ALIGN_WITH_INPUT {
+ *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .fixup : ALIGN_WITH_INPUT {
+ *(.fixup)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .dynamic : ALIGN_WITH_INPUT {
+ *(.dynamic)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .opd : ALIGN_WITH_INPUT {
+ KEEP (*(.opd))
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .tm_clone_table : ALIGN_WITH_INPUT {
+ *(.tm_clone_table)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .toc1 : ALIGN_WITH_INPUT {
+ *(.toc1)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .branch_lt : ALIGN_WITH_INPUT {
+ *(.branch_lt)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .got1 : ALIGN_WITH_INPUT {
+ *(.got1)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .got2 : ALIGN_WITH_INPUT {
+ *(.got2)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .got : ALIGN_WITH_INPUT {
+ *(.got)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .toc : ALIGN_WITH_INPUT {
+ *(.toc)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .plt : ALIGN_WITH_INPUT {
+ *(.plt)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .iplt : ALIGN_WITH_INPUT {
+ *(.iplt)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .interp : ALIGN_WITH_INPUT {
+ *(.interp)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .note.gnu.build-id : ALIGN_WITH_INPUT {
+ *(.note.gnu.build-id)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .hash : ALIGN_WITH_INPUT {
+ *(.hash)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .gnu.hash : ALIGN_WITH_INPUT {
+ *(.gnu.hash)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .dynsym : ALIGN_WITH_INPUT {
+ *(.dynsym)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .dynstr : ALIGN_WITH_INPUT {
+ *(.dynstr)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .gnu.version : ALIGN_WITH_INPUT {
+ *(.gnu.version)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .gnu.version_d : ALIGN_WITH_INPUT {
+ *(.gnu.version_d)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .gnu.version_r : ALIGN_WITH_INPUT {
+ *(.gnu.version_r)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .rela.dyn : ALIGN_WITH_INPUT {
+ *(.rela.init)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rela.fini)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rela.ctors)
+ *(.rela.dtors)
+ *(.rela.got)
+ *(.rela.got1)
+ *(.rela.got2)
+ *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+ *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+ *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+ *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ *(.rela.rtemsroset*)
+ *(.rela.rtemsrwset*)
+ PROVIDE_HIDDEN (__rel_iplt_start = .);
+ PROVIDE_HIDDEN (__rel_iplt_end = .);
+ PROVIDE_HIDDEN (__rela_iplt_start = .);
+ *(.rela.iplt)
+ PROVIDE_HIDDEN (__rela_iplt_end = .);
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .rela.plt : ALIGN_WITH_INPUT {
+ *(.rela.plt)
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ .rtemsroset : ALIGN_WITH_INPUT {
+ /* Special FreeBSD linker set sections */
+ __start_set_sysctl_set = .;
+ *(set_sysctl_*);
+ __stop_set_sysctl_set = .;
+ *(set_domain_*);
+ *(set_pseudo_*);
+
+ KEEP (*(SORT(*.rtemsroset.*)))
+ bsp_section_rodata_end = .;
+ } > REGION_RODATA AT > REGION_RODATA_LOAD
+ bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin;
+ bsp_section_rodata_load_begin = LOADADDR (.rodata);
+ bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size;
+
+ .rwbarrier : ALIGN_WITH_INPUT {
+ . = ALIGN (bsp_section_rwbarrier_align);
+ } > REGION_DATA AT > REGION_DATA
+
+ .fast_data : ALIGN_WITH_INPUT {
+ bsp_section_fast_data_begin = .;
+ *(SORT(.bsp_fast_data*))
+ bsp_section_fast_data_end = .;
+ } > REGION_FAST_DATA AT > REGION_FAST_DATA_LOAD
+ bsp_section_fast_data_size = bsp_section_fast_data_end - bsp_section_fast_data_begin;
+ bsp_section_fast_data_load_begin = LOADADDR (.fast_data);
+ bsp_section_fast_data_load_end = bsp_section_fast_data_load_begin + bsp_section_fast_data_size;
+
+ .data : ALIGN_WITH_INPUT {
+ bsp_section_data_begin = .;
+ *(SORT(.bsp_data*))
+ *(.data .data.* .gnu.linkonce.d.*)
+ SORT(CONSTRUCTORS)
+ } > REGION_DATA AT > REGION_DATA_LOAD
+ .data1 : ALIGN_WITH_INPUT {
+ *(.data1)
+ } > REGION_DATA AT > REGION_DATA_LOAD
+ .rtemsrwset : ALIGN_WITH_INPUT {
+ KEEP (*(SORT(.rtemsrwset.*)))
+ } > REGION_DATA AT > REGION_DATA_LOAD
+ .sdata : ALIGN_WITH_INPUT {
+ PROVIDE (_SDA_BASE_ = 32768);
+ *(.sdata .sdata.* .gnu.linkonce.s.*)
+ bsp_section_data_end = .;
+ } > REGION_DATA AT > REGION_DATA_LOAD
+ bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin;
+ bsp_section_data_load_begin = LOADADDR (.data);
+ bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size;
+
+ .sbss : ALIGN_WITH_INPUT {
+ bsp_section_sbss_begin = .;
+ *(.dynsbss)
+ *(.sbss .sbss.* .gnu.linkonce.sb.*)
+ *(.scommon)
+ bsp_section_sbss_end = .;
+ } > REGION_DATA AT > REGION_DATA
+ bsp_section_sbss_size = bsp_section_sbss_end - bsp_section_sbss_begin;
+
+ .bss : ALIGN_WITH_INPUT {
+ bsp_section_bss_begin = .;
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ bsp_section_bss_end = .;
+ } > REGION_BSS AT > REGION_BSS
+ bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin;
+
+ .rwextra : ALIGN_WITH_INPUT {
+ bsp_section_rwextra_begin = .;
+ *(.bsp_rwextra)
+ bsp_section_rwextra_end = .;
+ } > REGION_RWEXTRA AT > REGION_RWEXTRA
+ bsp_section_rwextra_size = bsp_section_rwextra_end - bsp_section_rwextra_begin;
+
+ .work : ALIGN_WITH_INPUT {
+ /*
+ * The work section will occupy the remaining REGION_WORK region and
+ * contains the RTEMS work space and heap.
+ */
+ bsp_section_work_begin = .;
+ . += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.);
+ bsp_section_work_end = .;
+ } > REGION_WORK AT > REGION_WORK
+ bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin;
+
+ .stack : ALIGN_WITH_INPUT {
+ /*
+ * The stack section will occupy the remaining REGION_STACK region and may
+ * contain the task stacks. Depending on the region distribution this
+ * section may be of zero size.
+ */
+ bsp_section_stack_begin = .;
+ . += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.);
+ bsp_section_stack_end = .;
+ } > REGION_STACK AT > REGION_STACK
+ bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
+
+ .nocache : ALIGN_WITH_INPUT {
+ bsp_section_nocache_begin = .;
+ *(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_nocache*)))
+ bsp_section_nocache_end = .;
+ } > REGION_NOCACHE AT > REGION_NOCACHE_LOAD
+ bsp_section_nocache_size = bsp_section_nocache_end - bsp_section_nocache_begin;
+ bsp_section_nocache_load_begin = LOADADDR (.nocache);
+ bsp_section_nocache_load_end = bsp_section_nocache_load_begin + bsp_section_nocache_size;
+
+ .nocachenoload (NOLOAD) : ALIGN_WITH_INPUT {
+ bsp_section_nocachenoload_begin = .;
+ *(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_noload_nocache*)))
+ bsp_section_nocacheheap_begin = .;
+ . += ORIGIN (REGION_NOCACHE) + LENGTH (REGION_NOCACHE) - ABSOLUTE (.);
+ bsp_section_nocacheheap_end = .;
+ bsp_section_nocachenoload_end = .;
+ } > REGION_NOCACHE AT > REGION_NOCACHE
+ bsp_section_nocacheheap_size = bsp_section_nocacheheap_end - bsp_section_nocacheheap_begin;
+ bsp_section_nocachenoload_size = bsp_section_nocachenoload_end - bsp_section_nocachenoload_begin;
+
+ .nvram (NOLOAD) : ALIGN_WITH_INPUT {
+ bsp_section_nvram_begin = .;
+ *(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_nvram*)))
+ bsp_section_nvram_end = .;
+ } > REGION_NVRAM AT > REGION_NVRAM
+ bsp_section_nvram_size = bsp_section_nvram_end - bsp_section_nvram_begin;
+
+ /* FIXME */
+ RamBase = ORIGIN (REGION_WORK);
+ RamSize = LENGTH (REGION_WORK);
+ WorkAreaBase = bsp_section_work_begin;
+ HeapSize = 0;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* DWARF 3 */
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }
+ .debug_ranges 0 : { *(.debug_ranges) }
+ /* DWARF Extension. */
+ .debug_macro 0 : { *(.debug_macro) }
+ .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+ .PPC.EMB.apuinfo 0 : { *(.PPC.EMB.apuinfo) }
+ /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+
+ /*
+ * This is a RTEMS specific section to catch all unexpected input
+ * sections. In case you get an error like
+ * "section `.unexpected_sections' will not fit in region
+ * `UNEXPECTED_SECTIONS'"
+ * you have to figure out the offending input section and add it to the
+ * appropriate output section definition above.
+ */
+ .unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
+}
diff --git a/bsps/powerpc/shared/start/linkcmds.share b/bsps/powerpc/shared/start/linkcmds.share
new file mode 100644
index 0000000000..59f538e3a2
--- /dev/null
+++ b/bsps/powerpc/shared/start/linkcmds.share
@@ -0,0 +1,296 @@
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+PROVIDE (__stack = 0);
+MEMORY {
+ VECTORS : ORIGIN = 0x0 , LENGTH = 0x3000
+ CODE : ORIGIN = 0x3000 , LENGTH = 32M - 0x3000
+}
+SECTIONS
+{
+ .entry_point_section :
+ {
+ KEEP(*(.entry_point_section))
+ } > VECTORS
+
+ /*
+ * This section is used only if NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
+ * is defined in vectors/vectors.S
+ */
+ .vectors :
+ {
+ *(.vectors)
+ } > VECTORS
+
+ /* Read-only sections, merged into text segment: */
+ .interp : { *(.interp) } > CODE
+ .hash : { *(.hash) } > CODE
+ .dynsym : { *(.dynsym) } > CODE
+ .dynstr : { *(.dynstr) } > CODE
+ .gnu.version : { *(.gnu.version) } > CODE
+ .gnu.version_d : { *(.gnu.version_d) } > CODE
+ .gnu.version_r : { *(.gnu.version_r) } > CODE
+ .rela.text :
+ { *(.rela.text) *(.rela.gnu.linkonce.t*) } > CODE
+ .rela.data :
+ { *(.rela.data) *(.rela.gnu.linkonce.d*) } > CODE
+ .rela.rodata :
+ { *(.rela.rodata*) *(.rela.gnu.linkonce.r*) } > CODE
+ .rela.got : { *(.rela.got) } > CODE
+ .rela.got1 : { *(.rela.got1) } > CODE
+ .rela.got2 : { *(.rela.got2) } > CODE
+ .rela.ctors : { *(.rela.ctors) } > CODE
+ .rela.dtors : { *(.rela.dtors) } > CODE
+ .rela.init : { *(.rela.init) } > CODE
+ .rela.fini : { *(.rela.fini) } > CODE
+ .rela.bss : { *(.rela.bss) } > CODE
+ .rela.plt : { *(.rela.plt) } > CODE
+ .rela.sdata : { *(.rela.sdata) } > CODE
+ .rela.sbss : { *(.rela.sbss) } > CODE
+ .rela.sdata2 : { *(.rela.sdata2) } > CODE
+ .rela.sbss2 : { *(.rela.sbss2) } > CODE
+ .rela.dyn : { *(.rela.dyn) } > CODE
+
+ .init : { KEEP(*(.init)) } > CODE
+
+ .text :
+ {
+ *(.text*)
+
+ /*
+ * Special FreeBSD sysctl sections.
+ */
+ . = ALIGN (16);
+ __start_set_sysctl_set = .;
+ *(set_sysctl_*);
+ __stop_set_sysctl_set = ABSOLUTE(.);
+ *(set_domain_*);
+ *(set_pseudo_*);
+
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t*)
+ } > CODE
+
+ .fini : { _fini = .; KEEP(*(.fini)) } > CODE
+
+ .rodata : { *(.rodata*) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > CODE
+ .rodata1 : { *(.rodata1) } > CODE
+
+ .tdata : {
+ _TLS_Data_begin = .;
+ *(.tdata .tdata.* .gnu.linkonce.td.*)
+ _TLS_Data_end = .;
+ } >CODE
+
+ .tbss : {
+ _TLS_BSS_begin = .;
+ *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+ _TLS_BSS_end = .;
+ } >CODE
+
+ _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+ _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+ _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+ _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+ _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+ _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+
+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. */
+ . = ALIGN(0x10000) + (. & (0x10000 - 1));
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ . = ALIGN(32 / 8);
+ PROVIDE (__preinit_array_start = .);
+ .preinit_array : { *(.preinit_array) } >CODE
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { *(.init_array) } >CODE
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { *(.fini_array) } >CODE
+ PROVIDE (__fini_array_end = .);
+
+ .sdata2 : {PROVIDE (_SDA2_BASE_ = 32768); *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >CODE
+ .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+ /* avoid empty sdata2/sbss2 area -- __eabi would not set up r2
+ * which may be important if run-time loading is used
+ */
+ . += 1;
+ PROVIDE (__SBSS2_END__ = .);
+ } >CODE
+ .eh_frame : { *(.eh_frame) } >CODE
+
+ /* NOTE: if the BSP uses page tables, the correctness of
+ * '_etext' (and __DATA_START__) is CRUCIAL - otherwise,
+ * an invalid mapping may result!!!
+ */
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. It would
+ be more correct to do this:
+ . = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
+ The current expression does not correctly handle the case of a
+ text segment ending precisely at the end of a page; it causes the
+ data segment to skip a page. The above expression does not have
+ this problem, but it will currently (2/95) cause BFD to allocate
+ a single segment, combining both text and data, for this case.
+ This will prevent the text segment from being shared among
+ multiple executions of the program; I think that is more
+ important than losing a page of the virtual address space (note
+ that no actual memory is lost; the page which is skipped can not
+ be referenced). */
+ . = ALIGN(0x1000);
+ .data ALIGN(0x1000) :
+ {
+ /* NOTE: if the BSP uses page tables, the correctness of
+ * '__DATA_START__' (and _etext) is CRUCIAL - otherwise,
+ * an invalid mapping may result!!!
+ */
+ PROVIDE(__DATA_START__ = ABSOLUTE(.) );
+ *(.data .data.* .gnu.linkonce.d*)
+ KEEP (*(SORT(.rtemsrwset.*)))
+ SORT(CONSTRUCTORS)
+ } > CODE
+ .data1 : { *(.data1) } > CODE
+ PROVIDE (__EXCEPT_START__ = .);
+ .gcc_except_table : { *(.gcc_except_table*) } > CODE
+ PROVIDE (__EXCEPT_END__ = .);
+ .got1 : { *(.got1) } > CODE
+ /* Put .ctors and .dtors next to the .got2 section, so that the pointers
+ get relocated with -mrelocatable. Also put in the .fixup pointers.
+ The current compiler no longer needs this, but keep it around for 2.7.2 */
+ PROVIDE (_GOT2_START_ = .);
+ .got2 : { *(.got2) } > CODE
+ .dynamic : { *(.dynamic) } > CODE
+
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } > CODE
+ .dtors :
+ {
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } > CODE
+
+
+ PROVIDE (_FIXUP_START_ = .);
+ .fixup : { *(.fixup) } > CODE
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (_GOT2_END_ = .);
+ PROVIDE (_GOT_START_ = .);
+
+ .got : { *(.got) } > CODE
+ .got.plt : { *(.got.plt) } > CODE
+
+ PROVIDE (_GOT_END_ = .);
+
+ .jcr : { KEEP (*(.jcr)) } > CODE
+
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ .sdata : { PROVIDE (_SDA_BASE_ = 32768); *(.sdata*) *(.gnu.linkonce.s.*) } >CODE
+ _edata = .;
+ PROVIDE (edata = .);
+ .sbss :
+ {
+ PROVIDE (__sbss_start = .);
+ *(.dynsbss)
+ *(.sbss* .gnu.linkonce.sb.*)
+ *(.scommon)
+ /* avoid empty sdata/sbss area -- __eabi would not set up r13
+ * which may be important if run-time loading is used
+ */
+ . += 1;
+ PROVIDE (__SBSS_END__ = .);
+ PROVIDE (__sbss_end = .);
+ } > CODE
+ .plt : { *(.plt) } > CODE
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.dynbss)
+ *(.bss .bss* .gnu.linkonce.b*)
+ *(COMMON)
+ . = ALIGN(16);
+ PROVIDE (__bss_end = .);
+ } > CODE
+ . = ALIGN(16);
+ . += 0x1000;
+ __stack = .;
+ _end = . ;
+ __rtems_end = . ;
+ PROVIDE (end = .);
+ /DISCARD/ :
+ {
+ *(.comment)
+ }
+
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* These must appear regardless of . */
+}
diff --git a/bsps/powerpc/shared/start/pgtbl_activate.c b/bsps/powerpc/shared/start/pgtbl_activate.c
new file mode 100644
index 0000000000..2455f1e06d
--- /dev/null
+++ b/bsps/powerpc/shared/start/pgtbl_activate.c
@@ -0,0 +1,77 @@
+#include <rtems.h>
+#include <libcpu/pte121.h>
+#include <libcpu/bat.h>
+
+/* Default activation of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default activation procedure.
+ */
+
+/*
+ * Authorship
+ * ----------
+ * This software was created by
+ * Till Straumann <strauman@slac.stanford.edu>, 4/2002,
+ * Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ * the Stanford Linear Accelerator Center, Stanford University,
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software. Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+void __BSP_default_pgtbl_activate(Triv121PgTbl pt);
+void
+BSP_pgtbl_activate(Triv121PgTbl)
+ __attribute__ (( weak, alias("__BSP_default_pgtbl_activate") ));
+
+void
+__BSP_default_pgtbl_activate(Triv121PgTbl pt)
+{
+ if (!pt) return;
+
+ /* switch the text/ro sements to RO only after
+ * initializing the interrupts because the irq_mng
+ * installs some code...
+ *
+ * activate the page table; it is still masked by the
+ * DBAT0, however
+ */
+ triv121PgTblActivate(pt);
+
+ /* finally, switch off DBAT0 */
+ setdbat(0,0,0,0,0);
+ /* At this point, DBAT0 is available for other use... */
+}
diff --git a/bsps/powerpc/shared/start/pgtbl_setup.c b/bsps/powerpc/shared/start/pgtbl_setup.c
new file mode 100644
index 0000000000..8a8407bd49
--- /dev/null
+++ b/bsps/powerpc/shared/start/pgtbl_setup.c
@@ -0,0 +1,135 @@
+#include <rtems.h>
+#include <libcpu/mmu.h>
+#include <rtems/bspIo.h>
+#include <libcpu/pte121.h>
+
+/* Default setup of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default setup.
+ *
+ * NOTE: while it is possible to change the individual
+ * mappings, the page table itself MUST be
+ * allocated at the top of the physical memory!
+ * bspstart.c RELIES on this.
+ * Also, the 'setup' routine must reduce
+ * *pmemsize by the size of the page table.
+ */
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+
+/*
+ * Authorship
+ * ----------
+ * This software was created by
+ * Till Straumann <strauman@slac.stanford.edu>, 4/2002,
+ * Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ * the Stanford Linear Accelerator Center, Stanford University,
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software. Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+Triv121PgTbl __BSP_default_pgtbl_setup(unsigned int *pmemsize);
+Triv121PgTbl BSP_pgtbl_setup(unsigned int *)
+ __attribute__ (( weak, alias("__BSP_default_pgtbl_setup") ));
+
+/* get those from the linker script.
+ * NOTE THAT THE CORRECTNESS OF THE LINKER SCRIPT IS CRUCIAL
+ */
+extern unsigned long __DATA_START__[], _etext[];
+
+Triv121PgTbl
+__BSP_default_pgtbl_setup(unsigned int *pmemsize)
+{
+Triv121PgTbl pt;
+unsigned ldPtSize,tmp;
+
+ /* Allocate a page table large enough to map
+ * the entire physical memory. We put the page
+ * table at the top of the physical memory.
+ */
+
+ /* get minimal size (log base 2) of PT for
+ * this board's memory
+ */
+ ldPtSize = triv121PgTblLdMinSize(*pmemsize);
+ ldPtSize++; /* double this amount -- then why? */
+
+ /* allocate the page table at the top of the physical
+ * memory - THIS IS NOT AN OPTION - bspstart.c RELIES
+ * ON THIS LAYOUT! (the size, however may be changed)
+ */
+ if ( (pt = triv121PgTblInit(*pmemsize - (1<<ldPtSize), ldPtSize)) ) {
+ /* map text and RO data read-only */
+ tmp = triv121PgTblMap(
+ pt,
+ TRIV121_121_VSID,
+ 0,
+ (PAGE_ALIGN((unsigned long)_etext) - 0) >> PG_SHIFT,
+ 0, /* WIMG */
+ TRIV121_PP_RO_PAGE);
+ if (TRIV121_MAP_SUCCESS != tmp) {
+ printk("Unable to map page index %i; reverting to BAT0\n",
+ tmp);
+ pt = 0;
+ } else {
+ /* map the rest (without the page table itself) RW */
+ tmp = triv121PgTblMap(
+ pt,
+ TRIV121_121_VSID,
+ (unsigned long)__DATA_START__,
+ (*pmemsize - (1<<ldPtSize) - (unsigned long)__DATA_START__ )>> PG_SHIFT,
+ 0, /* WIMG */
+ TRIV121_PP_RW_PAGE);
+ if (TRIV121_MAP_SUCCESS != tmp) {
+ printk("Unable to map page index %i; reverting to BAT0\n",
+ tmp);
+ pt = 0;
+ }
+ }
+ } else {
+ printk("WARNING: unable to allocate page table, keeping DBAT0\n");
+ }
+ if (pt) {
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Setting up page table mappings; protecting text/read-only data from write access\n");
+#endif
+ /* SUCCESS; reduce available memory by size of the page table */
+ *pmemsize -= (1<<ldPtSize);
+ }
+ return pt;
+}
diff --git a/bsps/powerpc/shared/start/ppc_idle.c b/bsps/powerpc/shared/start/ppc_idle.c
new file mode 100644
index 0000000000..44ae87311c
--- /dev/null
+++ b/bsps/powerpc/shared/start/ppc_idle.c
@@ -0,0 +1,106 @@
+/*
+ * ppc_idle.c
+ *
+ * Authorship
+ * ----------
+ * This software was created by
+ * Till Straumann <strauman@slac.stanford.edu>, 2010,
+ * Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ * the Stanford Linear Accelerator Center, Stanford University,
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software. Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+#include <bsp.h>
+#include <stdint.h>
+
+#ifdef BSP_IDLE_TASK_BODY
+
+/* Provide an idle-task body which switches the
+ * CPU into power-save mode when idle. Any exception
+ * (including an interrupt/external-exception)
+ * wakes it up.
+ *
+ * IIRC - this cannot be used on real hardware due
+ * to errata on many chips which is a real
+ * pity. However, when used under qemu it
+ * saves host-CPU cycles.
+ * While qemu-0.12.4 needed to be patched
+ * (would otherwise hang because an exception
+ * didn't clear MSR_POW) qemu-0.14.1 seems
+ * to work fine.
+ */
+
+#include <rtems/powerpc/registers.h>
+#include <libcpu/cpuIdent.h>
+#include <libcpu/spr.h>
+
+SPR_RW(HID0)
+
+void *
+bsp_ppc_idle_task_body(uintptr_t ignored)
+{
+uint32_t msr;
+
+ switch ( current_ppc_cpu ) {
+
+ case PPC_7400:
+ case PPC_7455:
+ case PPC_7457:
+ /* Must enable NAP mode in HID0 for MSR_POW to work */
+ _write_HID0( _read_HID0() | HID0_NAP );
+ break;
+
+ default:
+ break;
+ }
+
+ for ( ;; ) {
+ _CPU_MSR_GET(msr);
+ msr |= MSR_POW;
+ asm volatile(
+ "1: sync \n"
+ " mtmsr %0 \n"
+ " isync \n"
+ " b 1b \n"
+ ::"r"(msr)
+ );
+ }
+
+ return 0;
+}
+
+#endif
diff --git a/bsps/powerpc/shared/start/probeMemEnd.c b/bsps/powerpc/shared/start/probeMemEnd.c
new file mode 100644
index 0000000000..73b85d4709
--- /dev/null
+++ b/bsps/powerpc/shared/start/probeMemEnd.c
@@ -0,0 +1,219 @@
+/*
+ * Authorship
+ * ----------
+ * This software was created by
+ * Till Straumann <strauman@slac.stanford.edu>, 2005,
+ * Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ * the Stanford Linear Accelerator Center, Stanford University,
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software. Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+#include <bsp.h>
+#include <libcpu/spr.h>
+#include <libcpu/cpuIdent.h>
+#include <rtems/bspIo.h>
+#include <inttypes.h>
+
+/* Simple memory probing routine
+ *
+ * - call from MMU-disabled section to avoid having to
+ * set up mappings.
+ * NOTE: this implies WIMG = 0011
+ * - call AFTER image is at its destination and PRIOR
+ * to setting up the heap or using any memory beyond
+ * __rtems_end, i.e., the probing algorithm may safely
+ * tamper with memory > __rtems_end.
+ * - MUST lock caches since we're gonna hit space with
+ * no memory attached.
+ *
+ * ASSUMPTIONS:
+ * o image occupies addresses between 0..__rtems_end
+ * o memory size is a multiple of 1<<LD_MEM_PROBE_STEP
+ *
+ * CAVEATS:
+ * o all caches must be disabled or locked (some
+ * boards really don't like it if you try to
+ * cache physical addresses with nothing attached)
+ * and this is highly CPU dependent :-(...
+ *
+ * - RETURNS size of memory detected in bytes or 0 on
+ * error.
+ */
+
+/* declare as an array so the compiler doesn't generate
+ * a reloc to .sdata & friends
+ */
+extern uint32_t __rtems_end[];
+
+#ifndef LD_MEM_PROBE_STEP
+#define LD_MEM_PROBE_STEP (24) /* 16MB */
+#endif
+
+#define TAG 0xfeedcafe
+
+#define __DO_ALIGN(a, s) (((uint32_t)(a) + (s)-1) & ~((s)-1))
+#define __ALIGN(a) __DO_ALIGN(a, (1<<LD_MEM_PROBE_STEP))
+
+#define SWITCH_MSR(msr) \
+ do { \
+ register uint32_t __rr; \
+ asm volatile( \
+ " mtsrr1 %0 \n" \
+ " bl 1f \n" \
+ "1: mflr %0 \n" \
+ " addi %0, %0, 1f-1b \n"\
+ " mtsrr0 %0 \n" \
+ " sync \n" \
+ " rfi \n" \
+ "1: \n" \
+ :"=b&"(__rr) \
+ :"0"(msr) \
+ :"lr","memory" \
+ ); \
+ } while (0)
+
+SPR_RW(L2CR)
+SPR_RW(L3CR)
+SPR_RO(PPC_PVR)
+SPR_RW(HID0)
+
+
+/* Shouldn't matter if the caches are enabled or not... */
+
+/* FIXME: This should go into libcpu, really... */
+static int
+CPU_lockUnlockCaches(register int doLock)
+{
+register uint32_t v, x;
+ if ( _read_MSR() & MSR_VE ) {
+#define DSSALL 0x7e00066c /* dssall opcode */
+ __asm__ volatile(" .long %0"::"i"(DSSALL));
+#undef DSSALL
+ }
+ asm volatile("sync");
+ switch ( _read_PPC_PVR()>>16 ) {
+ default: printk(__FILE__" CPU_lockUnlockCaches(): unknown CPU (PVR = 0x%08" PRIx32 ")\n",_read_PPC_PVR());
+ return -1;
+ case PPC_750: printk("CPU_lockUnlockCaches(): Can't lock L2 on a mpc750, sorry :-(\n");
+ return -2; /* cannot lock L2 :-( */
+ case PPC_7455:
+ case PPC_7457:
+ v = _read_L3CR();
+ x = 1<<(31-9);
+ v = doLock ? v | x : v & ~x;
+ _write_L3CR(v);
+
+ v = _read_L2CR();
+ x = 1<<(31-11);
+ v = doLock ? v | x : v & ~x;
+ _write_L2CR(v);
+ break;
+
+ case PPC_7400:
+ v = _read_L2CR();
+ x = 1<<(31-21);
+ v = doLock ? v | x : v & ~x;
+ _write_L2CR(v);
+ break;
+ case PPC_603:
+ case PPC_604:
+ case PPC_604e:
+ break;
+ }
+
+ v = _read_HID0();
+ x = 1<<(31-19);
+ v = doLock ? v | x : v & ~x;
+ _write_HID0(v);
+ asm volatile("sync":::"memory");
+ return 0;
+}
+
+uint32_t
+probeMemoryEnd(void)
+{
+register volatile uint32_t *probe;
+register uint32_t scratch;
+register uint32_t tag = TAG;
+register uint32_t flags;
+
+ probe = (volatile uint32_t *)__ALIGN(__rtems_end);
+
+ /* Start with some checks. We avoid using any services
+ * such as 'printk' so we can run at a very early stage.
+ * Also, we *try* to avoid to really rely on the memory
+ * being unused by restoring the probed locations and
+ * keeping everything in registers. Hence we could
+ * even probe our own stack :-)
+ */
+
+ if ( CPU_lockUnlockCaches(1) )
+ return 0;
+
+ _CPU_MSR_GET(flags);
+
+ SWITCH_MSR( flags & ~(MSR_EE|MSR_DR|MSR_IR) );
+
+ for ( ; (uint32_t)probe ; probe += (1<<LD_MEM_PROBE_STEP)/sizeof(*probe) ) {
+
+ /* see if by chance our tag is already there */
+ if ( tag == (scratch = *probe) ) {
+ /* try another tag */
+ tag = ~tag;
+ }
+ *probe = tag;
+
+ /* make sure it's written out */
+ asm volatile ("sync":::"memory");
+
+ /* try to read back */
+ if ( tag != *probe ) {
+ break;
+ }
+ /* restore */
+ *probe = scratch;
+ /* make sure the icache is not contaminated */
+ asm volatile ("sync; icbi 0, %0"::"r"(probe):"memory");
+ }
+
+ SWITCH_MSR(flags);
+
+ CPU_lockUnlockCaches(0);
+
+ return (uint32_t) probe;
+}
diff --git a/bsps/powerpc/shared/start/sbrk.c b/bsps/powerpc/shared/start/sbrk.c
new file mode 100644
index 0000000000..f17a1511e4
--- /dev/null
+++ b/bsps/powerpc/shared/start/sbrk.c
@@ -0,0 +1,147 @@
+/*
+ * sbrk.c
+ *
+ * Authorship
+ * ----------
+ * This software was created by
+ * Till Straumann <strauman@slac.stanford.edu>, 2002,
+ * Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ * the Stanford Linear Accelerator Center, Stanford University,
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software. Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+/*
+ * Hack around the 32bit powerpc 32M problem:
+ *
+ * GCC by default uses relative branches which can not jump
+ * farther than 32M. Hence all program text is confined to
+ * a single 32M segment.
+ * This hack gives the RTEMS malloc region all memory below
+ * 32M at startup. Only when this region is exhausted will sbrk
+ * add more memory. Loading modules may fail at that point, hence
+ * the user is expected to load all modules at startup _prior_
+ * to malloc()ing lots of memory...
+ *
+ * NOTE: it would probably be better to have a separate region
+ * for module code.
+ */
+
+#include <errno.h>
+#include <unistd.h>
+
+#include <bsp/bootcard.h>
+
+#define INVALID_REMAINING_START ((uintptr_t) -1)
+
+static uintptr_t remaining_start = INVALID_REMAINING_START;
+static uintptr_t remaining_size = 0;
+
+/* App. may provide a value by defining the BSP_sbrk_policy
+ * variable.
+ *
+ * (-1) -> give all memory to the heap at initialization time
+ * > 0 -> value used as sbrk amount; initially give 32M
+ * 0 -> limit memory effectively to 32M.
+ *
+ */
+extern uintptr_t BSP_sbrk_policy[] __attribute__((weak));
+
+#define LIMIT_32M 0x02000000
+
+ptrdiff_t bsp_sbrk_init(Heap_Area *area, uintptr_t min_size)
+{
+ uintptr_t rval = 0;
+ uintptr_t policy;
+ uintptr_t remaining_end;
+
+ remaining_start = (uintptr_t) area->begin;
+ remaining_size = area->size;
+ remaining_end = remaining_start + remaining_size;
+
+ if (remaining_start < LIMIT_32M &&
+ remaining_end > LIMIT_32M &&
+ min_size <= LIMIT_32M - remaining_start) {
+ /* clip at LIMIT_32M */
+ rval = remaining_end - LIMIT_32M;
+ area->size = LIMIT_32M - remaining_start;
+ remaining_start = LIMIT_32M;
+ remaining_size = rval;
+ }
+
+ policy = (0 == BSP_sbrk_policy[0] ? (uintptr_t)(-1) : BSP_sbrk_policy[0]);
+ switch ( policy ) {
+ case (uintptr_t)(-1):
+ area->size += rval;
+ remaining_start = (uintptr_t) area->begin + area->size;
+ remaining_size = 0;
+ break;
+
+ case 0:
+ remaining_size = 0;
+ break;
+
+ default:
+ if ( rval > policy )
+ rval = policy;
+ break;
+ }
+
+ return (ptrdiff_t) (rval <= PTRDIFF_MAX ? rval : rval / 2);
+}
+
+/*
+ * This is just so the sbrk test can force its magic. All normal applications
+ * should just use the default implementation in this file.
+ */
+void *sbrk(ptrdiff_t incr) __attribute__ (( weak, alias("bsp_sbrk") ));
+static void *bsp_sbrk(ptrdiff_t incr)
+{
+ void *rval=(void*)-1;
+
+ if ( remaining_start != INVALID_REMAINING_START && incr <= remaining_size) {
+ remaining_size-=incr;
+ rval = (void *) remaining_start;
+ remaining_start += incr;
+ } else {
+ errno = ENOMEM;
+ }
+ #ifdef DEBUG
+ printk("************* SBRK 0x%08x (ret 0x%08x) **********\n", incr, rval);
+ #endif
+ return rval;
+}
diff --git a/bsps/powerpc/shared/start/zerobss.c b/bsps/powerpc/shared/start/zerobss.c
new file mode 100644
index 0000000000..b3ab1ad9d9
--- /dev/null
+++ b/bsps/powerpc/shared/start/zerobss.c
@@ -0,0 +1,42 @@
+/*
+ * zero the various bss areas.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ *
+ * Modified to support the MCP750.
+ * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
+ */
+
+#include <string.h>
+#include <bsp.h>
+
+/* prevent these from being accessed in the short data areas */
+extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
+extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
+extern unsigned long __bss_end[];
+
+void zero_bss(void)
+{
+ memset(
+ __SBSS_START__,
+ 0,
+ ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
+ );
+ memset(
+ __SBSS2_START__,
+ 0,
+ ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
+ );
+ memset(
+ __bss_start,
+ 0,
+ ((unsigned) __bss_end) - ((unsigned)__bss_start)
+ );
+}